ECL is a system-level specification language for HW/SW designs and is based on Esterel and C.
The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation.
Originally developed at Cadence Berkeley Labs.
A verilog language compiler written using Java and JavaCC. It produces a netlist, an ascii text file, of all the cell connections. It can compile very large circuits comprised of many modules.