Search Results for "textronics design software" - Page 3
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Showing 130 open source projects for "textronics design software"
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ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
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The Xholon project explores: software as systems of linked nodes, organized hierarchically. The Xholon toolkit supports this back-to-basics approach, and demonstrates practical benefits through examples from numerous domains.
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Tolk is based on the Spring design pattern to Filter & Translate data from data sources eg.TCP/IP connections, text files, databases and Serial (rs232,usb,BT). Typical applications is to manipulate data and manage devices such as IPICO RFID readers
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JGraph is the most powerful, lightweight, feature-rich, and thoroughly documented open-source graph component available for Java. See the project homepage at www.jgraph.com for information and downloads.
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InterPSS is an internet technology based software system for design, analysis, and simulation of power systems. Please visit www.interpss.org and wiki.interpss.org for more information.
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IPC 175x Utilities is a collection of software tools to support the IPC 1750 series of supplier declaration standards. These utilities are being developed to help electronics industry supply chain stakeholders implement the IPC 1750 series of standard.
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The linkFlow computer software program enables the user to perform civil hydraulic design tasks in a manner similar to a calculator. Vegetated and reinforced channels of any section can be designed using allowable shear and variable n values. c 2010
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vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.
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Java Suffix array library for phrase discovery. Inspired initially by the classic paper of Yamamoto & Church, with newer ideas from Abouelhoda et al and Kim et al. Adapted for large alphabet so that words can be tokenized as alphabet characters.
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The PARSEC CEE is the primary achievement of several years of effort at NASA's Marshall Space Flight Center. The CEE was developed to allow engineers in the Advanced Concepts Department to rapidly prototype launch vehicle and spacecraft concepts.
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Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.
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BANAL - Banal And Not A Language. A prototyping notation compatible with Java and C# (via the largest possible common footprint between the two).
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Extensible framework that enables productive design, analysis, and execution of arbitrary-sized neural-networks or system on a distributed, scalable, high-throughput runtime platform. Enables synapse-oriented-programming.
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ElectroMimic is an electronic circuit simulator in Java™. The simulator is focused on the piecewise-linear models normally used by undergraduate students, but can also be linked with external simulation software for more realistic results.
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KEManager models Knowledge Based Systems following a methodological approach ( Knowledge Engineering) for academical purposes of CommonKADS and IDEAL. It supports the viability test, some knowledge acquisition techniques and conceptual modeling.
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Clothes - sewing CAD for creation of models of clothes. Based on the new concept of the automated designing of clothes with use of parametrical model. Creates a base design of model of clothes and allows to change it depending on necessity of updating.
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This project is a software and a framework implementing a formal specification generation approach. The tool supports the theory on formal modeling, automated composition and formal verification of system specifications.
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The VSR is a repository of tools and challenges in verification (see for example epubs.cclrc.ac.uk/work-details?w=33971). It is part of the international grand challenge on software verification (eg http://vstte.ethz.ch/pdfs/vstte-hoare-misra.pdf)
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The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.
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SymtaP is a performance analysis tool to determine the worst case execution time for embedded real time applications.
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GISWidgets is a set of reusable UI widgets for geographic applications (GIS), such as referencing dialogs, legends, styling widgets or map panes. The project is based on GeoTools (in Java) and supports several GUI toolkits (e.g Swing, SWT). Note that, while functional, this library is not developed any further.
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jDSM is a Java library for representing and analyzing Design Structure Matrices (DSM). It can be used to analyze any Java software with regards to modularity.
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ORFer reads the NCBI GenBank XML sequence format and extracts open reading frames for proteins. Sequences can be requested by GI or accession number. ORFprimer is an extended software package for high throughput PCR primer design for biological sequences
