Search Results for "electronic" - Page 2
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Showing 154 open source projects for "electronic"
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zamiaCAD is a modular and extensible platform for HW design, analysis, and research. It translates a HW description (VHDL or Verilog) into a language independent IG structure. Applications like a simulator and an eclipse GUI build on top of the IG.
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Elexis Praxisprogramm
An Eclipse RCP program for all aspects of a (Swiss) medical practice
An Eclipse RCP program for all aspects of a medical practice: electronic medical record (EMR), laboratory findings etc., as well as accounting, billing (swiss TARMED-System, other systems to be developped) and other daily work. A fully functional version may be downloaded via http://download.elexis.info/3.1.0. Users may optionally include a demo database to have a playground for experiments. See also http://wiki.elexis.info/Installation_Elexis_3.0_OpenSource Elexis 3.1.0 was released on May, 4 2017. ... -
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Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
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bel_fft
FFT co-processor in Verilog based on the KISS FFT
bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and... -
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J-ICE stands for Jmol interface for crystallographic and electronic properties. Is an extension of the powerful, platform independent molecular visualizer Jmol, towards crystallographic and electronic properties. More info will be given soon.
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JReliability allows to derive several reliability-related measures like Mean-Time-To-Failure (MTTF) or Mission-Time (MT) of complex systems that are modeled using Boolean functions, efficiently encoded in Binary Decision Diagrams (BDDs).
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NEW OPTIMIZATION TECHNOLOGY & PLANNING EXPERIMENT. Technology is designed for multidimensional optimization practical problems with continuous object functions. Technology higher efficiency than traditional optimization methods.
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The Tolven platform and ePHR and eCHR applications enable interoperability across electronic health records for consumers and clinicians. Using Java, EJB3, Faces, Facelets, AJAX, relational database, and LDAP for security.
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Lab Processes
Rediscover the Simplicity http://www.atgclabs.com/
Help us to improve Lab Processes. We want to hear your feedback! Request new Lab Processes feature or module and receive a free Single User version with new feature. https://www.atgclabs.com/products/lp Lab Processes is a comprehensive and straightforward application specially designed for biologists and chemists who need to conduct a wide variety of tests and experiments on animals. Lab Processes requires minimal computing skills. Genetic and physiological data can be entered either... -
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EDM Calibration Baseline Fitting
EDMFit is an adjustment tool to estimate EDM calibration parameters.
An EDM calibration baseline is used to derive specific instrument errors of the electronic distance measurement (EDM) unit of a total station. EDMFit is a simple adjustment tool to estimate the EDM calibration parameters (addition constant and/or scale parameter). The adjustment process is according to ISO 17123-4. The parameters are checked for significance, to avoid an overestimation. Based on two classical hypothesis testing, EDMFit provides a reliable outlier detection. ... -
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Pipes is a desktop system which analyzes an AutoCad(TM) drawing of a sprinkler system, checks for flaws and after these are eliminated, adds the size/diameter labels to the drawing. Tutorial: http://users.norwoodlight.com/janh/wink/autopipes-entry.htm
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JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual"...
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An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.
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Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.
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HRDAG
Framework for Hierarchical Graph Decomposition
This is a framework used to decompose hierarchical graphs, i.e.,graphs which were created from or contain a hierarchy of modules. Each module is reused several times in the hierarchy. This may be useful to reverse-engineer human constructs like electronic equipment, manufactured machines, or bureaucratic hierarchies; but also to decompose natural constructs like gene-relation or protein-relation nets. -
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Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.
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PHDL
An HDL alternative to PCB graphical schematic capture tools.
PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic... -
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E.N.M.L. means Environmental Noise Model Language. The target of the project is the definition of a XML specification model mainly devoted to electronic acoustic data exchange. ENML aims to format ANY kind of noise measurement.
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Puran2 - Real Random Number Generator
Real Random Number Generator
Puran2 is a real random number generator based on electronic noise. The random bits are stored on a CD. The software allow the access to the random bits like a pseudo random number generator and is easy to use. It can be mixed with random number of a tausworthe generator to grow the count of random number. -
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egrsa
rsa-elgamal comparison
compare time of process between rsa and elgamal algorithm used to encryption and digital signature. -
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OpenMCD
Eclipse debugging tools for ecu development
OpenMCD wants to become a top-class collection of open source, eclipse based development and debugging tools for the development of electronic control units (ECUs). MCD stands for measurement, calibration and diagnostics: three activities often performed during the development of software for embedded and mechatronic systems. -
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This project aims the requirement of managed informations / documents in the treatment of patients, i.e. integrated care. The underlaying data model implements standards of electronic health recording, the project is based on a SQL db and Java EE framework. This is currently a student driven project for educational purposes.
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Java Decision Diagram Libraries (BDD)
Java Decision Diagrams (BDD) libraries: JDD and JBDD
This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD -
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EEToolbelt
A suite of calculators and conversion tools for engineers.
Includes a signal scaling app, many engineering unit conversion calcs, and a task list pad to keep track of progress or notes.
