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Showing 5 open source projects for "source"
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Mecrisp - A family of optimising native code Forth implementations for MSP430, ARM Cortex M, RISC-V RV32IM(C), MIPS M4K and FPGAs.
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SOCDL generates RTL register interfaces and supporting infrastructure for Systems On a Chip from a single-point-of-edit master register description. Template-driven design eases customization.
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F- is an ANSish Forth that uses a VM generator to compile Forth into C-based VM suitable for living in a C-based (or assembly or HDL) microcontroller project. The VM supplies 32-bit math, I/O, multitasking and debugger in a ROM footprint as small as 4kB.
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The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
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This is a simulator for the SMIS research MRI consoles. It executes compiled pulse sequences, and emulates the MR3040/50, MR3031, and RF cards. If you have an SMIS scanner, you will find this a useful pulse sequence development aid.
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