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Optimer: a SPICE base electrical/ electronic circuit optimization tool
This project is dedicated to the optimization of (any) electrical and electronic circuits and components using evolutionary and heuristic algorithms incorporated with SPICE simulators (such as HSPICE, ngSPICE, etc.).
We provide Optimer, which is a user graphical interface for circuit design and optimization.
Website:
https://www.circuitoptimization.com/
E-mail:
contact@circuitoptimization.com/
This project hosts the 'Simulation Tool', an extensible, interactive environment for carrying out simulation experiments of SBML models. This project can use RoadRunner or SBW enabled simulators to carry out simulations.
Program comparing Simulation Results for the SBML TestSuite
Compare SBML Test Suite Results
===============================
The [SBML Testsuite](http://sbml.org/Facilities/Online_SBML_Test_Suite) allows developers of ODE based simulators to test their implementation against a large number of test cases that test a wide aspect of the [SBML Specifications](http://sbml.org/Documents/Specifications).
While implementing my simulator [RoadRunner](http://roadrunner.sf.net) I wanted to be able to compare it using a wider range of parameters:
- filter for new tests
- filter for tests with specific tags
- mark elements that I know I did not implement