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- Programming Language: VHDL/Verilog ×
upf2cpf is a cool command line tool which will takes in a UPF(Unified Power Format) and will convert it to a CPF(Common Power Format).This tool is very useful for Chip Design Engineers, who want to feed the power related info about the RTL in UPF/CPF.
This project is an Adaptive LMS Equalizer / Filter implementation with piplined architecture for speedier performance.This project implements equalizer in VHDL so can be used with FPGA/CPLD
The Affordable BIOS Restoration Tool provides VHDL and C code to recover from failed BIOS upgrades using affordable CPLD's. EEPROM's and Flash chips can be restored with this flash programmer. Interfaces for DIP and tsop packages are being developed.5 weekly downloads
Development of a fully designed alarm clock implemented on the Xilinx Spartan3 board.
PID_control, real_time, matlab_simulink, xilinx_ise, fpga_spartan3e1 weekly downloads
Library of Approximate Adders2 weekly downloads
An arbitrary waveform generator (AWG) is a piece of electronic test equipment used to generate any arbitrarily defined electrical waveform as it's output. This waveforms can be generated with MATLAB.
BlowfishVHDL - free fully synthesizable Blowfish encryption algorithm hardware implementation.6 weekly downloads
A Development Framework for Coldfire
Custom uav is a complete flight control system in development. The project includes everything required for unmanned flight.
This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.
CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).1 weekly downloads
We are currently working with professors Bruce Land and Paul Kintner to develop a hardware mobile GPS receiver on an FPGA, capable of receiving L1 civilian GPS signals in real time.
The decimation Tools Set (DTS) generate automatically efficient implementations of Linear Feedback Shift Registers (LFSRs) in both software and hardware.
A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.46 weekly downloads
The aim of FAZIA project is to build a 4Pi array for charged particles
Automatic build management for VHDL and Verilog projects. The automatic dependency resolver finds the exact subset of sources, and the correct order they must appear in required to build a project. A Makefile automates the actual build itself.
libhdlfltp is a VHDL library of floating point operators, all of which are parametrized, synthesizable to FPGAs and cover a number of the core operators in math.h.1 weekly downloads
basic debug tools while using FPGA boards
Oscilloscope components, including 100MHz quad A/D, VHDL code for Xilinx FPGA, and driver for Octave or Matlab.
This project implements an On Screen Display for FPV (First Person View) for RC planes. Sends telemetry data from GPS & sensors embebed with video information.
A free VHDL IPs for general purpose FPGA developpement. Need GRLIB to work properly, to setup see README.
FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.17 weekly downloads