OSI-Approved Open Source (105)
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- GNU Library or Lesser General Public License version 3.0 (4)
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- Linux (102)
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- Grouping and Descriptive Categories (52)
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- Emulation and API Compatibility (7)
- Artificial Intelligence
- Electronic Design Automation (EDA)
- Human Machine Interfaces
- Information Analysis
- Interface Engine/Protocol Translator
- Test and Measurement
- Programming Language: VHDL/Verilog ×
This project is an Adaptive LMS Equalizer / Filter implementation with piplined architecture for speedier performance.This project implements equalizer in VHDL so can be used with FPGA/CPLD
Development of a fully designed alarm clock implemented on the Xilinx Spartan3 board.
An arbitrary waveform generator (AWG) is a piece of electronic test equipment used to generate any arbitrarily defined electrical waveform as it's output. This waveforms can be generated with MATLAB.
Custom uav is a complete flight control system in development. The project includes everything required for unmanned flight.
This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.
We are currently working with professors Bruce Land and Paul Kintner to develop a hardware mobile GPS receiver on an FPGA, capable of receiving L1 civilian GPS signals in real time.
The decimation Tools Set (DTS) generate automatically efficient implementations of Linear Feedback Shift Registers (LFSRs) in both software and hardware.
The aim of FAZIA project is to build a 4Pi array for charged particles
Automatic build management for VHDL and Verilog projects. The automatic dependency resolver finds the exact subset of sources, and the correct order they must appear in required to build a project. A Makefile automates the actual build itself.
basic debug tools while using FPGA boards
Galaxy Intellectual Property Cores
Project that converts the Gameboy advance into a oscilloscope with a frequency range of 0-50MHZ
Implementação de um serviço de otimização de funções baseado em Algorítmos Genéticos em um Hardware dedicado e disponível para utilização através de uma interface Web
This project includes a set of tools and guidelines designed for rapid production of large-scale embedded systems projects. The tools enable quick generation of reusable, reconfigurable hardware, using a user-specified hardware description language.
Platform for advanced open source IP-Core development, i. e. dynamic memory controllers for FPGAs.
This project is to design a high speed vision system used in RoboCup.It involves integrating an FPGA onto the current robotic platform and implement software to do object recognition and provide useful informations to the rest of Robotic system.
The RoboCup Team of Shanghai University (aka. Strive Team) is now devoting itself to the Humanoid League Contest. Many features like machine vision, pace generation, speech cognition, etc. of the humanoid robots is rising here in the following years.
Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
LTProg is pindriver technology multi devices programmer througth the PC USB Port
Labcoat; the VHDL graphic emulator.
Network-on-Chip design exploration tool based on SystemC.
Napoleon Embedded SPARC V8 32-bits
The project goal is to develop several IP cores that would implement artificial neural networks using FPGA resources. These cores will be designed in such a way to allow easy integration in the Xilinx EDK framework.
Open RVC-CAL to HDL (ORC2HDL) is an Eclipse Plugin which uses the Open RVC-CAL Compiler (ORCC) and the openForge HDL Synthesizer. This plugin gives the ability to generate HDL code from a RVC-CAL model.