Electronic Design Automation (EDA) Software

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Electronic Design Automation (EDA) Software

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  • DigitalSimulator

    The DigitalSimulator is your Virtual Electronics Lab, allowing you to design, simulate and output your digital circuit board designs.

  • Open SystemC Initiative (OSCI)

    The Open SystemC Initiative (OSCI) is a collaborative effort to support and advance SystemC as a de facto standard for system-level design. SystemC is an interoperable, C++ SoC/IP modeling platform for fast system-level design and verification

    Downloads: 20 This Week Last Update: See Project
  • Alliance CAD System

    Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor.

  • ThSim

    Simulator for thermal conduction in solid material. Uses SPICE for calculations and wxWindows for providing Windows and Linux GUI.

    Downloads: 10 This Week Last Update: See Project
  • a canvas for drawing graphs in delphi

    Delphi project extending TSimpleGraph (www.delphiarea.com) functionality. It creates a framework for data vizualization applications like industrial monitoring systems, workflow designer, just to name a few.

    Downloads: 7 This Week Last Update: See Project
  • LandXML Software Development Kit

    LandXML C++ Software Development Kit. LandXML is an open, XML-based data standard for civil engineering and transportation applications.

    Downloads: 6 This Week Last Update: See Project
  • ECL Language and Compiler

    ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.

    Downloads: 3 This Week Last Update: See Project
  • Qlogico

    Qlogico is a digital circuit simulator. True table, manipulation of boolean expresions, schematic capture and simulation, finite state machines, table of transitions, VHDL.

    Downloads: 2 This Week Last Update: See Project
  • G2C, LandGML to LandXML transform

    G2C (Geospatial to Civil) The LandGML Interoperability Experiment initiated by Autodesk, U.S. Army Corps of Engineers Engineering Research and Development Center, and Galdos Systems. this open source tool transforms LandGML into LandXML documents.

    Downloads: 1 This Week Last Update: See Project
  • asfpga-An assembler for FPGA design

    asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set. The current version al

    Downloads: 1 This Week Last Update: See Project
  • C++ Template Classes of MVL

    C++ template classes for Multi-Value Logic support arbitrary precision and user defined Multi-Value Logic types. This library comes with pre-defined data types: integer, boolean, bit, logic, std_logic, bit_vector, logic_vector and std_logic_vector.

    Downloads: 0 This Week Last Update: See Project
  • Geometric Technology

    Geometric Technology - Programs written for MicroStation CAD System design automation.

    Downloads: 0 This Week Last Update: See Project
  • Java Decision Diagram Libraries (BDD)

    Java Decision Diagrams (BDD) libraries: JDD and JBDD

    This project used to contain two decision diagrams libraries: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD Both projects have now been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home If you are wondering why the move was made after 14 years (!!) on SourceForge, I suggest you read this article: http://arstechnica.com/information-technology/2015/05/sourceforge-grabs-gimp-for-windows-account-wraps-installer-in-bundle-pushing-adware/

    Downloads: 0 This Week Last Update: See Project
  • ManifestParse

    An Open Source Parser Library for parsing Verilog, System Verilog, EDIF and VHDL source files.

    Downloads: 0 This Week Last Update: See Project
  • ParaDef

    ParaDef (Parametric Definition System) is a complete CAD/CAE/Product Development solution. ParaDef encompasses all aspects of product development into a single IDE, enabling rapid development of new products and in-depth analysis of existing solutions.

    Downloads: 0 This Week Last Update: See Project
  • Verilator

    Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.

    Downloads: 0 This Week Last Update: See Project
  • smith chart tracer

    the project take inputs & plots smith chart with respect to input

    Downloads: 0 This Week Last Update: See Project
  • wxArt2D

    wxArt2D gives wxWindows applications sophisticated vector drawing functionality. It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.

  • z88 free finite elements program

    Z88 a free finite elements program featuring 20 different element types for LINUX and Windows. Includes two solvers, a mesher, plot programs and a GUI with online help.

    Downloads: 0 This Week Last Update: See Project
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