Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox
Eng-DB-2 is a light-weight engineering database. It allows to manage components/assemblies and their associated AVLs and technical documentation, assemble BOMs for finished goods and annotate these with quotations received from suppliers.
ENIAC: Electrical Network Interactive Analysis Console. Educational software originally made for the study and simulation of electrical LTI circuits, but which supply also a lot of mathematics computations, like complex, polynomial and matrix operations.
Qlogico is a digital circuit simulator. True table, manipulation of boolean expresions, schematic capture and simulation, finite state machines, table of transitions, VHDL.
G2C (Geospatial to Civil) The LandGML Interoperability Experiment initiated by Autodesk, U.S. Army Corps of Engineers Engineering Research and Development Center, and Galdos Systems. this open source tool transforms LandGML into LandXML documents.
The idea of this project is automatize hydrogen Booster system created by Stanley Meyer to implement it in cars,trucks and electric plants as well as for production of free energy.
Java Decision Diagrams (BDD) libraries: JDD and JBDD
This project used to contain two decision diagrams libraries: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD Both projects have now been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home If you are wondering why the move was made after 14 years (!!) on SourceForge, I suggest you read this article: http://arstechnica.com/information-technology/2015/05/sourceforge-grabs-gimp-for-windows-account-wraps-installer-in-bundle-pushing-adware/
An Open Source Parser Library for parsing Verilog, System Verilog, EDIF and VHDL source files.
OpenDesigner borrows the best ideas from 3d modeling tools, drafting software, the internet and the opensource community to create a powerful and easy to use tool for designing in the real world.
asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set. The current version al
wxArt2D gives wxWindows applications sophisticated vector drawing functionality. It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.