- Linux (5)
- Mac (5)
- Modern (5)
- BSD (4)
- Windows (4)
- Grouping and Descriptive Categories (3)
Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.1 weekly downloads
Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.1 weekly downloads
Confluence is a functional programming language for digital logic design.
The idea of this project is automatize hydrogen Booster system created by Stanley Meyer to implement it in cars,trucks and electric plants as well as for production of free energy.
An Open Source Parser Library for parsing Verilog, System Verilog, EDIF and VHDL source files.