A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Repository migrated to: https://github.com/Qucs/ADMS For checkout do: git clone https://github.com/Qucs/ADMS.git
MATRIX 1.4 Free & Open Audio Power Amplifier Technology Platform
Development Project of Free & Open Audio Power Amplifier Core Circuit System - based MATRIX 1.4 Platform. MATRIX 1.4 discovered by HERU HIMAWAN TEJO LAKSONO & MUJIONO IRKHAS from Indonesia. MATRIX 1.4 is free & open technology developed & released under the therms of GNU General Public License V. 3 (GPL3).
QSapecNG is a Qt-based symbolic analysis program for linear analog circuits. In fact, it consists of two indipendently parts: the SapecNG framework engine, and the application gui QSapecNG.
Schematic circuit editor for VLSI and Mixed mode circuit simulation.
Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this gives top speed performance, even on very big circuits. I have succesfully managed to simulate complete VLSI projects with this tool, both digital (Verilog / VHDL) and analog (Spice). The user interface is built with the Tcl-Tk toolkit, tcl is also the extension language used to send commands to the program. Schematics can be printed in SVG, PNG, PDF, formats. XSCHEM runs on Linux or other Unix-likes with Xorg server and on Windows with the Cygwin layer and required tools installed.
Integrator for gEDA (GPL EDA) Suites & Bridge gEDA to Kicad
Gschem-finalizer is free & open source EDA-tool to finalize gEDA-gschem schematic project. It integrates several programs such gEDA (gschem, gnetlist, and NG-SPICE), GNU a2ps, psutils, and some basic GNU/Linux or UNIX programs. This software is written based PHP language & running on GNU/LINUX OS variants & UNIX OS variants. Features: 1. Generate netlists (SPICE 3F5, GEDA PCB, Kicad PCB/EESchema) 2. Pre-testing (additional DRC) 3. Result multi-pages in single file PDF output compilation with operating point description. 4. "Smartly" generate SPICE netlist for analog, digital, or mixed analysis simulation. 5. Generate Kicad netlist from gEDA schematic format. & More... See the manual for more info (http://gschemfinalizer.sourceforge.net/) The example of results are available at http://sourceforge.net/projects/matrix14freeamp/files/
lilpM32 is a MIPS-like processor designed in Logisim, assembler program and documentation for them. Complete assembler and fully functional instruction set with I/O and subroutines features allow to write full-blown complicated programs.
openCarac : Automatize your Spice simulator runnings
openCarac aims to automatize the characterization of electronic circuits using your favourite Spice simulator and provide output files in HTML, LaTeX (c) and GNU Octave (c) scripts. openCarac is natively compatible with various simulators including: - Ngspice (c), http://ngspice.sourceforge.net - Gnucap (c), http://gnucap.org/dokuwiki/doku.php?id=gnucap:start - Xyce (c), http://xyce.sandia.gov It comes with an API which permits to add other features and extend openCarac compatibility; openCarac is also TCL package and comes with functions that can be called in any TCL script. Adding a GUI is the next step in openCarac development, it will be available in a future release.
ChronoSVG generates a timing diagram, as used in electrical devices documentations, from a simple and intuitive ASCII source file. The output file is in SVG format, and makes use of CSS to defer the styling details to presentation time.
FXtransformer Designer is a graphical design aid for both power and RF transformers. RF Design: Broadband, Single-Tuned, Double-Tuned.
Lossi (LOgikSchaltungsSImulator - german for "logic circuit simulator"). It simulates logic circuits. Really.
an open source software for electronic design automation (EDA).
OpenECAD is an open source software for electronic design automation (EDA / ECAD). OpenECAD integrates all stages of the design process: Schematic Capture, PCB layout, Component editing, CAM file generation. OpenECAD is cross-platform program, written with QT5 framework and run on Windows, Linux, and Mac OS X.
Open-source tools to assist the Low Band DXer
Provide a modern open-source set of tools to assist in the planning, construction, and operation of a Low Band (40m, 80m, and 160m) DX amateur radio station. Initial goal is to provide cross-platform functionality of ON4UN's set of tools for Microsoft 95 that can be run on many other systems. (This project is not connected with ON4UN.)
Unified Verification Environment
The aim of the UVE project is to create software that automatically generates a verification testbench (TB) written in SystemVerilog (SV) and integrating the UVM methodology. UVE makes the rapid development of a verification environment a simple process. The generated TB is directly able to perform random actions on the DUV (design under verification). For this UVE provides a graphical user interface, a code generator, compilation scripts and a library of verification IPs (VIP). One of the main innovations of UVE is a list of TODOs in the TB code which help in finalizing the TB. This is especially useful for developers not familiar with SV and/or UVE, but also experienced developers profit from that easy to use task list. Moreover, the graphical interface lets the user observe the structure of the generated testbench. Files can be accessed easily by double clicking on the graphical view. Simulation can be launched directly from the tool.
Brushless DC controller (ESC) Fully functional sensorless ESC. Uses BEMF detecton for rotor position sensing. Software trays to maintain maximum speed on currently available power(pwm duty). It works like ordinary DC motor. More load means, on same power, lower speed and higer current. Motor speed (current) PWM , direction etc. is adjustable via serial port commands. For example - press "k" button to add power, "j" button to reduce power and "t" button to reverse rotor direction etc. I have used neodymium magnets BLDC, CD drive BLDC and car generator as BLDC motor without any modification in software, hardware - it just works. Schematic is done using EAGLE PCB software Software is witten in spin langue. If You want to improve this project then put your thoughts into discussion section. Or if You have some burning information - drop me an email "firstname.lastname@example.org" enjoy,