Program Avr Linux Manager, to prosty interfejs dla programów avr-gcc oraz avrdude. Umożliwia łatwą kompilację i programowanie mikrokontrolerów.
AvrGui jest to program, który zajmuje się kompilacją i programowaniem kontrolerów. Wykorzystuje on kompilator avr-gcc. Zastosowanie biblioteki Qt umożliwia prace programu zarówno na systemach Linux, jak i windows.
Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.
ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
A clearing house for various pieces of open source software which use the GenCAM data format for input or output of electronic interconnect (PWB, PCB, PWA, PCA) information.
A small Python utility used to manage multiple concurrent installations of Genesis 2000.
Jove - The Open Verification Environment for the Java (TM) Platform
This is a very powerful Schematic and PCB layout tool for Engineer
This is a very powerful Schematic and PCB layout tool for electronic Engineer. It is very easy to use. Coming version will add the SPICE features as well as the 3D model. This tool is target for single user, so all the things such as Schematic, PCB layout, SPICE model, 3D models are all combined into a single project file "*.prj" in ZIP file format. Anyone should able to explore and see the structure of files using any zip tool.
Open Design Space Exploration Framework
OpenDSE is a design space exploration framework for embedded systems, written in Java. It follows the Y-chart approach where an application consisting of data-dependent tasks is mapped to an architecture consisting of resources.
An HDL alternative to PCB graphical schematic capture tools.
PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.
Finds the closest combination of two resistors from the E24 or E96 set of preferred values for a given resistance value.
Identify electronic resistor values
This HTML utility allows the user to select standard color codes or surface mount numbers, then it identifies the resistor value. There is no need to memorize color codes or multipliers. An online working example of this program can be used at ZoomAviation.com/programs.
Hierarchical Schematic and PCB
This project is in a pre-alpha stage and is intended to give a rough idea about the final program. It does not do much more than draw pretty pictures. Hierarchical circuit layout is commonplace amongst IC designers, but Spider PCB brings hierarchical layout to the PCB industry. Not only is the schematic hierarchical, but also the layout. Ever wanted to lay out a 16-band equaliser, with 5 sound channels? Lots of copying and pasting on the PCB-side. Just imagine if you could lay out one channel of the equaliser, then go up one hierarchical level and lay out 1 sound channel, using your single-band equaliser 16 times, with the only difference being the component values. You can then go up one hierarchical level more to lay out the 5 sound channels, add some headers and a power supply circuit, and another to panellise the PCB's for production. No copying and pasting. No trouble editing a mistake later. This is the idea behind Spider PCB. For more information, read the Wiki.
Scripting Tcl interface to Qt multiplatform library
Simulator for thermal conduction in solid material. Uses SPICE for calculations and wxWindows for providing Windows and Linux GUI.
Libraries and sample code for accessing remote toolpath delivery services such as VoluMill. Although much of the code is specific to the VoluMill service, it also defines open standards for exchanging toolpath information, parameters, and geometry.
iBookshelf is an application for cataloging your book collection and designing bookshelves based on this data.
Power consumption analysis tools for embedded systems. MARTE to AADL model transformation with ATL for tools interoperability. More info on the project at http://sourceforge.net/apps/trac/lab-sticc/
This a print circuit board editor written in Qt. It aims to provide sprint layout like functionalities. It is not actually fonctional at this time, even as an alpha release but I will update my work regularly.
A simple VHDL(VHSIC Hardware Description Language) preprocessor
Virtual electronic circuit simulation with JAVA based schematic entry and wave viewer, based on (Berkeley) SPICE, for any OS/Server/Browser configuration. Due to missing public feedback for over one year its status is set to INACTIVE (1/2004) - sorry.
The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
simple digital logic circuit simulator, using only NAND gates. written as a standalone app for your web browser
GBTiler, a Gerber circuit board tiling program allows engineers, electronics hobbyists and other users with Gerber RS274X format files to "tile" or combine separate Gerber files -- circuit boards -- into a single, valid Gerber formatted file.