Sparse is a direct method solver for the large sparse matrices that are associated with electrical circuit simulation. It uses LU factorization and handles both real and complex square matrices.It is intended to solve many matrices with the same structure
Spice+ is a general-purpose circuit simulation program, based directly on SPICE 3F.5 from the University of California (Berkeley). An improved version of Spice for DOS, Windows and Linux. http://spicep.sourceforge.net
KFilter is an application to design acoustic hifi loudspeakers in a theoretical way. It provides an interactive analysis of the equivalent analogue circuit design.
Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.
lilpM32 is a MIPS-like processor designed in Logisim, assembler program and documentation for them. Complete assembler and fully functional instruction set with I/O and subroutines features allow to write full-blown complicated programs.
The gEDA project is working on producing a full GPL'd suite of Electronic Design Automation tools. These tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production.
ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
A very fast, yet accurate Transmission Line Calculator, suitable for silicon (Si+SiO2) substrates. The results are within +- 1% (in most cases) of those calculated by popular 2.5D-3D full wave simulators, while being orders of magnitude (7-8) faster.
Tarski: A toolkit for the Theory of Equality
Provides a GPL'd test suite for verification of the verilog language. This project is affiliated with the Icarus Verilog compiler effort at icarus.com, and test reports are collected from that project.
This is a very simple simulator for the Microchip PIC16C71. I've used it for various small projects. It has an option video display feature to simulate a software-generated video output, which I used to debug PIC-Pong.
Extensions to the circuit simulator Ngspice. One extension is the integration of the next generation build system SCons.
MMTL, the Multilayer Multiconductor Transmission Line 2-D and 2.5-D electromagnetic modeling tool suite, generates transmission parameters and SPICE models from descriptions of electronics interconnect dimensions and materials properties.
DICaD is a free EDA software for VLSI circuits design.
decida is [de]vice & [ci]rcuit [d]ata [a]nalysis. It is used for electron device characterization, procedural simulation/analysis of electronic circuits, or more general data analysis tasks.
GPICD - The GNU PIC Programmer and In-Circuit Debugger. GPICD is an open-source Programmer and In-Circuit debugger for the Microchip (TM) PIC (TM) family of microcontrollers. It is an ideal complement for the gputils development tool set.
An easy to use spice interface with GTK. This project allows to start and view the simultions with one or two click. It uses gschem for the schematics and ngspice as simulator.
ViPEC is an network analyser for electrical networks. It takes a schematic description of an electrical network, and performs a simulation of the circuit response in the frequency domain. Output is in the form of port parameters (S, Y and Z).
Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.
HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
The purpose of the project is to design a methodology for making Application Specific Instruction set Processors. The project is a part of the Embedded Systems project in IIT-Delhi
XAvrTools is an open source graphical frontend for development with Atmels AVR microcontrollers using the UISP download tool and the AVR-GCC C compiler for LINUX. It is written in C++ using KDevelop and the QT library. It will include a software wizard.
PROJECT IS DISCUNTINUED This project is about to contain information how to write data like boot loader into various flash devices on diffrent CPUs trough JTAG interface
Extensible and easy to use logic circuit simulator.
The Open SystemC Initiative (OSCI) is a collaborative effort to support and advance SystemC as a de facto standard for system-level design. SystemC is an interoperable, C++ SoC/IP modeling platform for fast system-level design and verification