Program Avr Linux Manager, to prosty interfejs dla programów avr-gcc oraz avrdude. Umożliwia łatwą kompilację i programowanie mikrokontrolerów.
AvrGui jest to program, który zajmuje się kompilacją i programowaniem kontrolerów. Wykorzystuje on kompilator avr-gcc. Zastosowanie biblioteki Qt umożliwia prace programu zarówno na systemach Linux, jak i windows.
An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Banyan is an enterprise class, web based, information management system that helps people work collaboratively to solve complex problems. Banyan increases project performance and reduces risk through the power of collaborative clear thinking.
Blitzer is a simple tool for driving the SX-Blitz microcontroller programmer from Parallax. There is now a version for PalmOS devices.
Boardstatus is a Web-CGI/Postgresql database to manage electronic prototypes, including butch lists, notes, and and parameters. Support for users with different authorizations is included.
Bobware tool suite is a set of small EDA tools which are useful in the design of integrated circuits. The suite contains a perl/tk script for region planning large ASICs (application specific integrated circuits.)
Open source C++ framework utilizing boost.org libraries and specialized for development of EDA applications.
BuddyScout is an interface between BuDDy (Binary Decision Diagram library) and GHC (Glasgow Haskell Compiler). It enables you to use the BDD library from within Haskell programs.
C++ template classes for Multi-Value Logic support arbitrary precision and user defined Multi-Value Logic types. This library comes with pre-defined data types: integer, boolean, bit, logic, std_logic, bit_vector, logic_vector and std_logic_vector.
GDS visualization and parallelized capacitance extraction
Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.
Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
Structuring & Modelling of Collaterized Debt Obligations (CDOs)
"cif2tribes" is a console-based tool for converting integrated circuit layouts into maps usable in the game Tribes 2, as a 3D visualization aid. The project code is modular enough to be easily extended to different game engines and input file formats.
A console app simulating a CNC controllable bench lathe. Drawing output into a picture, several error checking.
Cadence 614 installing scripts with source files
this code include automation for installing Cadence614 with Calibre2011 all you need to do is to install Centos 6.5 32bit on your machine http://archive.kernel.org/centos-vault/6.5/isos/i386/CentOS-6.5-i386-LiveCD.iso and the scripts will do the rest
Advanced Software Configuration Management (SCM) for Cadence DFII. Delivers full Perforce capability to Cadence DFII using Best Practices for SCM. Please see http://public.perforce.com/public/perforce/cdsp4/index.html
Caneda (Circuits and Networks EDA) is an open source EDA software.
Caneda (Circuits and Networks EDA) is an open source EDA software focused on easy of use and portability. While in the short term schematic capture and simulation is the primary goal, in the long term future, PCB and layout edition will be covered.
Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.
This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.
I'm working on a larger project to aid in the efforts of architecture for humanity (AFH) http://www.architectureforhumanity.org/ What I need is a basic, easy to use 3D drawing program that can draw, convert, resize and overlay the 3d model on a jpg map.
ChipVault is a project organizer for VHDL and Verilog RTL hardware designs. It provides rapid hierarchy navigation and includes Revision Control and hooks to launching external tools. ChipVault is written in Perl and is small, fast and efficient.
ChronoSVG generates a timing diagram, as used in electrical devices documentations, from a simple and intuitive ASCII source file. The output file is in SVG format, and makes use of CSS to defer the styling details to presentation time.
A toolkit to generate the SPICE file of equivalent circuit for piezoelectronic transducer.
Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox