Open Source Linux Electronic Design Automation (EDA) Software - Page 14

Open Network Object System A Internet of things Content management system. Would you like to automate and controll remotely your home appliances from internet or lan using your phone /pc ? This program is for you! Internet of things made easy for everyone. Open source , simple to use , no need to know any programming language , you can add your programs easy , it runs bash command!every linux system will run it , portable . No installation required! just copy the folder where you want, connect your arduino to the usb and run the python program on the pc.

ODog

This JAVA library give the possibility to have a CANVAS object in JAVA SWING graphical applications, including CANVAS tools such as hand-tool, linker-tool, group-tool like VISIO(TM) application. The library take advantage of Java2D packages to reach a

Open firmware for Honeywell Rondostat HR20 radiator thermostats

Project to develop an open toolkit (primarily) for the design of power kites.

The Open SystemC Initiative (OSCI) is a collaborative effort to support and advance SystemC as a de facto standard for system-level design. SystemC is an interoperable, C++ SoC/IP modeling platform for fast system-level design and verification

OpenDSE is a design space exploration framework for embedded systems, written in Java. It follows the Y-chart approach where an application consisting of data-dependent tasks is mapped to an architecture consisting of resources.

During the period from 1990 through 2002, EPRI funded the development of a Lightning Protection Design Workstation (LPDW), which was used by many utilities to assess the lightning performance of distribution lines. Since about 2002, this program has not been available. EPRI decided to release the simulation kernel of LPDW under an open-source license (GPL v3), so it may be incorporated into IEEE Flash and other projects. OpenETran can presently simulate multi-conductor power lines, insulators, surge arresters, non-linear grounds, and lightning strokes. It efficiently calculates energy and charge duty on surge arresters, and iterates to find the critical lightning current causing flashover on one or more phases. It is also suitable for use in substation insulation coordination. Capacitor switching, TRV, and other applicaitons may be added. EPRI originally had permission to use code from the Numerical Recipes book in LPDW. These routines have been removed in favor of GSL.

This project is aimed to build an Open Source Manufacturing Execution System based on J2EE, JBoss technology. Intesity based optimization

OpenMie aims to solve electromagnetic scattering problems via the Mie method to provide a benchmark against which to test more general scattering codes. Complete field solutions are given for a number of practical geometries.

Now you can translate your vectorial and bitmap design data to your CNC machines! OpenCAM provides an interface where you can configure your CNC equipment and then export the file followiing it's commands! You can export PS,PDF,AI,EPS,DXF,SVG and Bitmap

This project aims at providing Open Source tools for the development and the verification of SystemC/TLM (Transaction Level Modeling) IP models, and at promoting their use by embedded software developers on SoC (System-On-Chip).

Design and implementation of silicon and software for baseband processors conforming to IEEE wireless standards. Initial focus on WiMAX and WiFi.

The main target of this project is to create a Open Source System on Chip generator for FPGA. This generator will use following technologies: Python, Wishbone SoC bus specifications and VHDL.

The PARSEC CEE is the primary achievement of several years of effort at NASA's Marshall Space Flight Center. The CEE was developed to allow engineers in the Advanced Concepts Department to rapidly prototype launch vehicle and spacecraft concepts.

This is an easy-2-use Printed Circuit Board designer program with user-friendly interface and with some interesting capabilities. The full source and the internals are well documented.

PCB-Tools is a system independent, a Java programmed Eclipse-RCP application for developing circuit diagrams and printed circuit boards. It uses Eclipse Graphical Editor Framework (GEF) to draw diagrams and layouts.

The program is designed for automatic coloring schemes of printed circuit boards for ease of installation. For its work requires some files with information on the printed circuit board, package generated by P-CAD. The basic principle: each type of component (identical components) are marked with a unique symbol that has its own color and style. This simplifies the visual search component on the board. The program also generates a text list of components, where the marks, what type of components is associated with which character on the circuit board.

PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.

This project provides a 'brute-force' search for optimum assembler fragments for Microchip Technology Inc's mid-range PIC processor range.

PKtool is a SystemC/C++ environment dedicated to the power estimation for digital systems described in SystemC.

A simulation tool for Phase-Locked Loops with charge pump phase detectors. The tool simulates phase and frequency steps with continous reference and random bit stream reference for data clock recovery.

Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)

Generic packet visualization tool for generating flow diagrams from formatted logs. Can be used for cache coherency diagrams, software interaction diagrams or to plot network communications.

Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design