UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.
Prithvi Development Studio is BASIC language based IDE for Microchip ® PIC Microcontrollers.
A java based digital logic simulator, designed to be used as an educational tool. uses a GUI to allow users to quickly and easily create and visualise circuits from simple components. User can create custom components
Collection of tools for allowing CAD (Computer Aided Design) systems to interact with STEP (ISO 10303) data.
SpiceX is a simple schematic capture program for graphical interaction with Spice-based electronic simulation cores, i.e., placing components, wires and test points. SpiceX creates NETLISTs and runs simulations directly from the GUI.
The XML PCB Renderer is an application which takes an XML definition of a printed circuit board (consisting of pads, tracks and components) and renders it to a PNG file suitable for printing onto paper or transparency ready for UV exposure.
BuddyScout is an interface between BuDDy (Binary Decision Diagram library) and GHC (Glasgow Haskell Compiler). It enables you to use the BDD library from within Haskell programs.
Electronics design automation (EDA) suite for design of electronic circuits and systems, simulation (through physical / semi-empirical methods) and PCB layout/fabrication tools. Includes a GUI interface, Unix-style command-line utilities and a C API.
This project is a collection of field solver tools.
Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.
This project is developed for Full Customer Design Enviroment. Schematic Entry/SPICE/SPICE(RF)/Layout/Verilog-AMS Via /Verilog Via Will be included.
This is a project with hardware and software. It will show u an Intelligent Car based on PIC
SOCDL generates RTL register interfaces and supporting infrastructure for Systems On a Chip from a single-point-of-edit master register description. Template-driven design eases customization.
Make your own virtual FPGA system and profile deeply with CI.
TestDrive Profiling Master is a free simulation software for Verilog/SystemVerilog and C/C++. It supports a CI (Continuous Integration) activity for H/W & S/W engineers' cooperation. Run by MS Windows environment, its use is governed by MIT License(Profiles) and LGPLv3(TestDrive Profiling Master). Based on the powerful compiler Verilator and GCC, TestDrive Profiling Master provides a totally free virtual FPGA system environment with various dynamic documents for profiling in deep on your system design. It performs a seamless conversion to a real FPGA environment without any changes of your testing software. I hope you will accomplish a successful design with TestDrive Profiling Master. Q&A : email@example.com
Tilink is a micro scada breakout project based around Texas Instruments line of programmable graphic calculators. Notably all programming may be done in TiBasic to ease development and focus on the problem. This is a Ti calculator based break out board.
A parser to check the syntax of Touchstone 2.0 data files.
COTSon scalable simulation infrastructure
Here are many materials related to my lectures. Electrical Network Analysis, DSP, Programming, Optical Fiber Systems.
An assembler for the Xilinx Picoblaze soft processor.