Open-source interpreted Verilog simulator with a feature set and performance similar to Verilog-XL. Implements all IEEE 1364-1995 features along with some Verilog-2001 features. Full support for Verilog PLIs.
PVSim is a Portable Verilog Simulator for Mac OSX, Linux, and Windows. It features a fast compile-simulate-display cycle. The core is in C++, and the GUI, wxPython.
xc3sprog is a suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under linux. Originally based on code written by Andrew Rogers (http://www.rogerstech.co.uk/ ).
Multiple dielectric transmission line calculator using a 2D field solver to compute the transmission line characteristics from the circuit trace dimensions entered by the user.
Kactus2 is a toolset for IP-XACT based SoC design and provides packing, integration and configuration of HW and SW components, plus register design and HDL import and generation. For publications use this reference: http://joss.theoj.org/papers/73e33d6850d24f0d6aad0d5f38937f83 The source code is hosted at https://github.com/kactus2/kactus2dev. Example IPs are available at https://github.com/kactus2/ipxactexamplelib Video tutorials are available at https://www.youtube.com/user/Kactus2Tutorial Issue tracker is available at https://kactus2.cs.tut.fi
This project is a general AVR bootloader, for different type of AVR device, all you need to do is modify macro definition, and you don not need to modify the main program.
Netsim is a mobile ad hoc network simulator targeted at large heterogeneous node configurations. It is written in Java and is easily extensible through its modular concept.
SPICE netlist visualizer
NetlistViewer is a tool capable of loading netlists in text format (currently only SPICE netlists) and convert them in a schematic (i..e graphical) form.
A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.
TkGate is a event driven digital circuit simulator with a tcl/tk-based graphical editor. TkGate supports a wide range of primitive circuit elements as well as user-defined modules for hierarchical design.
Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox
naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information
The aim of this project is to develop a GDSII viewer by using Java programming language. Efforts will be made especially on ease-of-use, efficiency, and capacity.
This project aims to develop an opensource software with an attractive and efficient GUI which allows to design linear electronic circuits and to characterize existing ones.
This project is for converting PCB RS274X gerber files to RS274NGC Gcode files. Currently this software is in the early development stages. Currently working to simplify the program and improve reliability.
This program is a simulator/debugger for Atmel AVR flash microcontrollers, built with Motif (incompatible with Less Tiff). It has language independent interface. This version can almost fully simulates AT90S and ATmega series.
MMTL, the Multilayer Multiconductor Transmission Line 2-D and 2.5-D electromagnetic modeling tool suite, generates transmission parameters and SPICE models from descriptions of electronics interconnect dimensions and materials properties.
FidoCad is a Windows program for drawing electronic schematics and printed circuits.
Gerber Drill IPC2581
View Gerber Files and Drill Files. View IPC-2581.
Motorola HC08 (especially MC68HC908JB8) monitor-mode programmer project. Includes hardware part (RS-232 programmer design in Eagle) and software part (in C++ for KDE/Qt).
VISTAS (VCSEL Integrated Spatio-Temporal Advanced Simulator) is a highly efficient 2D, time-domain Vertical-Cavity Surface-Emitting Laser (VCSEL) model aimed at optimizing entire optical links.
dark themed version of free Audacity sound editor
audacity-extra now provides a sleek dark themed version of the Audacity open source sound editor. The project experiments with Audacity variations. There's a vowel-sound target-practice display for language learners and an analog waveform data logger for embedded systems.
Superscalar processor simulator for in-order and out-of-order processors. It also simulates several configurations of multiprocessors. Currently only supports the MIPS instructions set.
The ASCO project aims to bring circuit optimization capabilities to existing SPICE simulators using a high-performance parallel differential evolution (DE) optimization algorithm. It supports Eldo, HSPICE, LTspice, Spectre, and Qucs.
Current work at: https://github.com/jcampos73/DraftCable WARNING: version 1.0.94 previous to 2016-01-22 has a BUG! Download again! Min. Req: Win XP SP3 If you get missing mfc120.dll install vcredist_x86.exe at prog folder CAD design tool for electrical and block diagrams with net list compilation. Tool for creating new parts included. DO NOT lose time copy and pasting cable datasheet. This program, unlike MS Visio or other generic tools, has specific business funcionalities like: 1.- You can double-click a cable in the diagram and define the wiring of that cable in a pop-up dialog. 2.- Also the parts have properties that define all the connector Jacks / Plugs (J/P) they have (e.g., J1 or P1 would appear at the part). 3.- Rack lay out tool. You can associate each part with its rack view equivalent. For example: you can associate a part that is a Server with a rack part of 4U height to place at the rack This software produces block diagrams and wiring sheets