Electronic Design Automation (EDA) Software

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Electronic Design Automation (EDA) Software

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  • Rotary clock layout tools

    a set of free tools and software aimed at design automation. SPICE ( NG-spice )MAGIC XCIRCUIT Main aim - to automate the layout of clock distribution on a chip, using rotary clock oscilation.

    Downloads: 0 This Week Last Update: See Project
  • Carrion

    This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.

    Downloads: 0 This Week Last Update: See Project
  • Skidbladnir

    toolbox with information and programs for Computer Aided Innovation The scientific background of Skidbladnir is known as the Theory of Inventive Problem Solving; in English abbreviated as TIPS or TRIZ, in German as TRIS.

    Downloads: 0 This Week Last Update: See Project
  • Source Navigator for Verilog

    Source Navigator for Verilog is a verilog parser that allows Source Navigator to be used with the Verilog Hardware Description Language. http://sources.redhat.com/sourcenav

    Downloads: 0 This Week Last Update: See Project
  • Synopsys Consultant Script Repository

    An online SSL (128-bit strong encryption) repository for scripts created and maintained by Synopsys Design Consultants.

    Downloads: 0 This Week Last Update: See Project
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  • BoardStatus

    Boardstatus is a Web-CGI/Postgresql database to manage electronic prototypes, including butch lists, notes, and and parameters. Support for users with different authorizations is included.

    Downloads: 0 This Week Last Update: See Project
  • Extra Element Solver

    The purpose of this project is to create a framework for automatically computing , symbolically, low entry expressions for linear circuits using R.D. Middlebrook's Extra Element Theorem.

    Downloads: 0 This Week Last Update: See Project
  • CDO Structuring

    Structuring & Modelling of Collaterized Debt Obligations (CDOs)

    Downloads: 0 This Week Last Update: See Project
  • nctuapr

    Testing for modern techniques, algorithms and optimization methods.

    Downloads: 0 This Week Last Update: See Project
  • Verilog Perl

    The Verilog-Perl distribution provides Perl preprocessing, parsing and utilities for the Verilog Language. It is also available from CPAN under the Verilog:: namespace.

    Downloads: 0 This Week Last Update: See Project
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  • magFDM

    Magnetostatic finite differences simulation tool based on GNU Octave and a Perl/Tk user interface.

    Downloads: 0 This Week Last Update: See Project
  • zuphinx

    zuphinx (say zoo'finks) is an efficient VHDL design environment.

    Downloads: 0 This Week Last Update: See Project
  • QMod: Queue-like model of OoO Processor

    QMod is a semi-analytic model of Out of Order processor performance. The project downloads include MathCAD worksheets, a cycle-based simulator in Java, and helper scripts. See home page for papers.

    Downloads: 0 This Week Last Update: See Project
  • PLP

    Powerfull pre-processor

    Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)

    Downloads: 5 This Week Last Update: See Project
  • SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

    Downloads: 0 This Week Last Update: See Project
  • Machet Digital Design Flow

    A collection of Perl scripts for digital design simulation and FPGA synthesis automation. It supports Verilog, VHDL and mixed language (Verilog + VHDL) designs. See the MediaWiki for more information on how to use it.

    Downloads: 0 This Week Last Update: See Project
  • Eng-DB-2

    Eng-DB-2 is a light-weight engineering database. It allows to manage components/assemblies and their associated AVLs and technical documentation, assemble BOMs for finished goods and annotate these with quotations received from suppliers.

    Downloads: 3 This Week Last Update: See Project

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