GBTiler, a Gerber circuit board tiling program allows engineers, electronics hobbyists and other users with Gerber RS274X format files to "tile" or combine separate Gerber files -- circuit boards -- into a single, valid Gerber formatted file.
Java source to C source translator, which allows to write MCU programs in Java. Now AVR are supported, others can be added. Convenient Java methods instead of manual register handling.
An HDL alternative to PCB graphical schematic capture tools.
PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.
Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
simple digital logic circuit simulator, using only NAND gates. written as a standalone app for your web browser
Library of Approximate Adders
We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well as hardware designers to evaluate their code and design. To the best of our knowledge, this is the first open-source library of approximate adders that facilitates reproducible comparisons and further research and development in this direction across various layers of design abstraction. This work is a result of collaborative effort between Chair for Embedded Systems (CES) at Karlsruhe Institute of Technology (KIT), Germany and Vision Image and Signal Processing (VISpro) Lab at SEECS-NUST, Pakistan.
An active filter design assistant. Electrical engineers can use it to design and simulate analog active filters.
The Temperature Controller Software is a java application built to get temperature readings from a 1-wire temperature sensor and turn on or off power to a heater (heating mat) to maintain temperature. www.TheDIYSite.com sells the hardware
APVM/Oroboro is an approach to embedding Python in Verilog.
This software enables you to build and test data types, function block types, resource types, device types and system configurations according to the IEC 61499 standard.
GerbMerge is a program for combining Gerber/Excellon files for printed circuit board manufacturing. It can panelize copies of the same job, different jobs, and can also rotate jobs. GerbMerge can run in batch mode or interactively with a GUI.
Grid-tools is a collection of scripts to aid in the submission of complex jobs to either Sun Grid Engine or LSF.
NecJGui is an antennas design tool, interface for Numerical Electromagnetic Code. It allows easily making NEC input files, and viewing them in 3D. It also contains a version of the simulator, so it's complete IDE for full-wave EM simulation.
Project to develop an open toolkit (primarily) for the design of power kites.
RegMapDef is a project to provide an XML schema and associated tools to support a standardized way of describing register maps. The tools shall incorporate XSL style sheets and scripts to generate documentation, header files, implementation stubs etc.
XSpiceHDL, an XSpice-VerilogHDL co-simulator incorporates a Schematic Capture GUI, modified run-time DLL capable XSpice3f5 based engine with Berkley Sockets IPC via CodeModel & PLI 1.0/2.0(VPI) DLLs, all in C++, wxWidgets & MSVC++ 6.0.
With eparts, you can manage your stock of electronic components. You can create and manage projects, part lists, suppliers, buying lists etc. and import projects from EDA tool 'kicad'. It's written with Ruby on Rails.
Microwave Design Kit is a GNU GPL collection of GNU Octave scripts to design microwave circuits at a block diagram level.
pyLPCTools is a replacement for the Flash Programming Tools use with the Philips(tm)/NXP(tm) LPC2xxx series of ARM based microcontrollers. pyLPCTools is a script together with some ARM assembly language and a Python user interface. Please Donate !!
SPICE netlist preprocessor in Python that: combines elements, drops insignificant nodes and elements, and allows parameterization of netlists like HSPICE.
Register Interface Description tool
A tool to descibe sets of memory mapped registers and to generate different outputs, e.g. C header files, Verilog source code, HTML documets, from that description. This tool is written in Java and uses ANTLR for parsing and StringTemplates for output generation.
uSimulator is a circuit simulator including fully programmable microcontrollers (microchip assembly language).
unPIC is a Perl script that disassembles Microchip microcontroller's HEX files. This is a powerful tool for all reverse engeneers that creates a well understandable assembly source from a binary file. Creates xrefs, labels, subroutines and much more...
xerlox ( say: zer'locks ) is both a tool and a toolbox that brings Perl and Verilog together to create an efficient Verilog HDL design environment. xerlox promotes up-front documentation, efficient coding, and design reuse.