GBTiler, a Gerber circuit board tiling program allows engineers, electronics hobbyists and other users with Gerber RS274X format files to "tile" or combine separate Gerber files -- circuit boards -- into a single, valid Gerber formatted file.
toolbox with information and programs for Computer Aided Innovation The scientific background of Skidbladnir is known as the Theory of Inventive Problem Solving; in English abbreviated as TIPS or TRIZ, in German as TRIS.
VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.
unPIC is a Perl script that disassembles Microchip microcontroller's HEX files. This is a powerful tool for all reverse engeneers that creates a well understandable assembly source from a binary file. Creates xrefs, labels, subroutines and much more...
Boardstatus is a Web-CGI/Postgresql database to manage electronic prototypes, including butch lists, notes, and and parameters. Support for users with different authorizations is included.
This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.
Grid-tools is a collection of scripts to aid in the submission of complex jobs to either Sun Grid Engine or LSF.
Project to develop an open toolkit (primarily) for the design of power kites.
QMod is a semi-analytic model of Out of Order processor performance. The project downloads include MathCAD worksheets, a cycle-based simulator in Java, and helper scripts. See home page for papers.
Libraries for building tools and scripts for ECAD. Contains physical, circuit and Verilog libraries bolted into the 'carrion' module.
An online SSL (128-bit strong encryption) repository for scripts created and maintained by Synopsys Design Consultants.
Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.
A Hardware/Software Co-Simulation package utilizing TCP/IP networking to allow C and Perl based development simulation environments using Verilog or SystemC hardware models.
Magnetostatic finite differences simulation tool based on GNU Octave and a Perl/Tk user interface.
xerlox ( say: zer'locks ) is both a tool and a toolbox that brings Perl and Verilog together to create an efficient Verilog HDL design environment. xerlox promotes up-front documentation, efficient coding, and design reuse.