ASDM-NoC
Asynchronous Spatial Division Multiplexing Router for On-Chip Networks
... testbench provided
Languages:
* Routers are written in synthesizable SystemVerilog
* Test benches are provided by SystemC
Software requirements:
* The open source Nangate 45nm cell library
* Synopsys Design Compiler (Synthesis)
* Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation)