Give your IT, operations, and business teams the ability to deliver exceptional services—without the complexity.
Freshservice is an intuitive, AI-powered platform that helps IT, operations, and business teams deliver exceptional service without the usual complexity. Automate repetitive tasks, resolve issues faster, and provide seamless support across the organization. From managing incidents and assets to driving smarter decisions, Freshservice makes it easy to stay efficient and scale with confidence.
Try it Free
Earn up to 16% annual interest with Nexo.
More flexibility. More control.
Generate interest, access liquidity without selling, and execute trades seamlessly. All in one platform.
Geographic restrictions, eligibility, and terms apply.
Free cooperative operating system designed for microcontrollers
Free, simple and tiny cooperative operating system (OS) designed for deeply embedded applications.
Target: ARM Cortex-M, STM8, AVR8.
It was inspired by the concept of a state machine.
Procedure executed by the task (task state) doesn't have to be noreturn-type. It will be executed into an infinite loop. There's a dedicated function for immediate change the task state.
Free real-time operating system designed for microcontrollers
Free, extremely simple, amazingly tiny and very fast real-time operating system (RTOS) designed for deeply embedded applications.
Target: ARM Cortex-M, STM8.
It was inspired by the concept of a state machine. Procedure executed by the task (task state) doesn't have to be noreturn-type. It will be executed into an infinite loop. There's a dedicated function for immediate change the task state.
A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system.
Supports:
UART, SysTick Timer, ADC, SPI, EEPROM, PWM.
Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc.
Implementation of virtual threads for the XS-1. Currently a simple context switching implementation for the XMOS XS-1 architecture (Gn, Ln products). Allows a user to run low speed processes on a single thread using time sliced scheduling.
A kernel written by Merck Hung.
IA32 architecture, 32-bit protected mode, Memory paging, Keyboard, Timer Interrupt Handling, and a simple kernel shell to operate.
Written in C language, development under Linux environment.