Search Results for "basic compiler avr"
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Showing 2 open source projects for "basic compiler avr"
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ASDM-NoC
Asynchronous Spatial Division Multiplexing Router for On-Chip Networks
This project provide a reconfigurable asynchronous SDM router which can be configured into a basic wormhole router or an SDM router with multiple virtual circuits in every direction. Features: * 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) * The dimension order routing (XY routing) * Available flow control methods: wormhole, SDM, VC * Reconfigurable number of virtual circuits, buffer size, data width * Fully synthesizable router implementation * SystemC testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation) -
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OpenMAC is a TinyOS-based implementation of IEEE 802.15.4 MAC layer, which lies at the core of MeshNetics ZigBee stack, and provides basic wireless networking (star,peer to peer) to WSN's. Available for low-power ZigBit modules and Atmel AVR Z-Link Kits
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