Showing 4 open source projects for "synopsys"

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    SVUnit

    Systemverilog Unit Test Framework

    SVUnit is a unit test framework for developers writing code in systemverilog. Verify systemverilog modules, classes and interfaces in isolation with SVUnit to eliminate bugs before they infest your design!
    Downloads: 0 This Week
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  • 2
    This is the public release of code for the Synopsys Ottawa SNUG presentation "ICC Tips and Tricks" by Chris Krueger on September 28 2010
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  • 3
    Verilog 2005 synthesizable subset parser built on ANTLR framework. 3-nov-2014: latest release here: https://github.com/gburdell/parser
    Downloads: 1 This Week
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  • 4
    The RegWorks(TM) is a set of tools intended to automate the process of register class creation directly from the design specification. It can also be used with other third party tools such as Synopsys RAL or equivalent.
    Downloads: 0 This Week
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