Search Results for "risc-v simulator"
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Showing 18 open source projects for "risc-v simulator"
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BSC
Bluespec Compiler (BSC)
...The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. A companion simulator enables fast functional execution and debugging before handing designs to traditional verification and synthesis stages. The ecosystem includes standard libraries, FIFOs, interfaces, and utilities that encourage reuse and clean separation of datapaths and control. By raising the abstraction for hardware architecture while preserving efficient output, BSC helps teams explore complex designs—such as RISC-V cores or accelerators—more productively. -
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felix-assiris
Aproximate emulator for Felix-C-256 Assiris jobs
...At their turn the IRISes were produced under licence from SDS (Scientific Data Systems, later XDS after acquisition by Xerox) being similar to the SDS Sigma-7 and Sigma-9 computers. There is a SIMH simulator of the Sigma computers, with an operating system (CP-V) in binary form that works like the original. This is a simulator of one single threaded Felix job that must consist of a restriction to the most commonly used instructions and of the ASSIRIS assembler, together with essential control instructions and macros. -
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SimpleLog
SimpleLog is a pilot logbook for desktop Windows, Mac and Linux
...Video Tutorials: https://www.youtube.com/watch?v=RfGoizd7hMA&list=PLfLyXdVN4XRC1wKOZl8YKelEiiK2hPezo -
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IEC60870-5 101 Code win Linux download
IEC 101 Source code Library Windows Linux POSIX - c, c++, c# .net
v=rITfG-BOnHs&list=PL4tVfIsUhy1bsVPrJVW4nknHozdfcWE5u -
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ARES
Antibiotic Resistance Evolution Simulator
ARES (Antibiotic Resistance Evolution Simulator) is a membrane computing-based model, able to simulate complex biological landscapes. It uses a nested membrane-surroundings entitites scheme formatted in a XML file. The created scenarios emulate entities as: i) Resistance genes, able to detoxify antibiotics. These genes can be located in the plasmid, in conjugative elements or in the chromosome; ii) plasmids and conjugative elements transferring genes between bacterial cells; iii) bacterial cells; iv) individual microbiotas where bacterial species coexist; v) hosts containing the microbiotic ensembles; vi) environment(s) where the hosts are contained. ... -
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RARS
RISC-V Assembler and Runtime Simulator
RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V. -
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RexSimulator
A full simulator of the WRAMP CPU and REX board.
This project is a simulator of the WRAMP (Waikato RISC Architecture MicroProcessor) CPU used at the University of Waikato for teaching computer architecture concepts, along with the Rex board that contains the CPU. -
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(RoboSim) Robot Simulator
(RoboSim) Java based Robot Localization and Path Planner Simulator.
...Dynamic Programming Heuristics i. Euclidean Distance ii. Euclidean Distance(+) iii. Euclidean Distance(*) iv. Euclidean Distance Squared v. Manhattan Distance vi. Chebyshev Distance -
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Circuit simulator SPECI-SPICE
Circuit simulators like SPICE for low memory computers
SPECI-SPICE is a subset of SPICE intended to run on low powered computers like Amstrad CPC, ZX Spectrum, CP/M machines, old PC machines, some programmable calculators,etc. by keeping most important functionality of SPICE 2. -
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Sensory Effect Simulator
Simulator for sensory effect and multimedia content
This program provides means for simulating multimedia content (e.g., videos) with sensory effects based on the MPEG-V: Media Context and Control standard, especially Part 3: Sensory Information (ISO/IEC 23005-3). NOTE: SESim will not be developed any further as it is now integrated in the Sensory Effect Video Annotation (SEVino) tool: https://sourceforge.net/projects/sevino/ -
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Sensory Effect Video Annotation
Annotation tool for sensory effects and multimedia content
This program provides means for annotating multimedia content (e.g., videos) with sensory effects based on the MPEG-V: Media Context and Control standard, especially Part 3: Sensory Information (ISO/IEC 23005-3). Now with integrated Sensory Effect Simulator (SESim). -
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DigMIPS
A simple MIPS processor for Chipmunk DigLog circuit simulator
- DigMIPS is a simple 1-cycle-per-instruction MIPS processor working under DigLog circuit simulator. - DigMIPS is provided with an assembler and a C compiler. - DigMIPS serve as a nice support to teach the basics of computer architecture. Features: - 8 instructions - 8K RAM + 8K ROM - I/O periphals (keyboard and teletype screen) Software: - DigASM (assembler) - DigCC (C compiler) -
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RFXCAM
A CAD/CAM Package for CNC GCode Creation
RFXCAM is an opensource CAD / CAM package targeted at CNC machines (Mills, routers...). The idea is to create the basic interface for geometry manipulation and toolpath creation. Heavy python plugin support will allow a future community to create a vast selection of unique plugins for added functionality specific to their needs. Tutorial 1: https://www.youtube.com/watch?v=bNvE2H8b6Yc&feature=youtu.be -
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FSCAET
Flight Safety Classification and Evaluation Tool
...It provides a report describing the violated conditions of the flight. The library is extended by auxiliary functions for visualization of the recorded flight data. The evaluation tool is used together with full motion simulator depicted at http://www.youtube.com/watch?v=d8SQa9_el8k . -
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Emergency Flight Path Planner (Lite)
Emergency Flight Path Planner (Lite)
v=iPH_eeze5sg . -
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Pamvotis is a Wireless LAN Simulator for all the current physical layer extentions of the IEEE 802.11 (IEEE 802.11 a/b/g) standard and for the IEEE 802.11e Draft for Quality of Service in WLANs.
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ANVIL - (A)(N)other (V)erilog (I)nteraction (L)evel. C++ and VPI/C code to easily instrument RTL/Verilog (dut) and C++ testbench (tb) for more powerful and efficient verification (i.e., C++/tb drives simulator).
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An open source PowerPC CPU simulator and assembler, with associated documentation and tutorials, to facilitate the teaching of modern RISC assembly language programming. Written in java for portability.
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