Search Results for "cadence" - Page 2
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Showing 36 open source projects for "cadence"
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The developed graphical interface is based on the SKILL language which is a Lisp dialect used as a scripting language and PCell (Parameterized Cells) description language used in many EDA software suites by Cadence Design Systems.
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ASDM-NoC
Asynchronous Spatial Division Multiplexing Router for On-Chip Networks
...Features: * 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) * The dimension order routing (XY routing) * Available flow control methods: wormhole, SDM, VC * Reconfigurable number of virtual circuits, buffer size, data width * Fully synthesizable router implementation * SystemC testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation) -
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ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
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The purpose of this project is to make public tools to leverage the advanced design capabilities of Cadence in our micro-electrical-mechanical systems (MEMS) designs.
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Oagen enables the use of Open Access PCells in a Cadence DFII Framework where Open Access is not supported.
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Cadence Guestbook is a guestbook script allowing webmasters to host and manage their own guestbook hosting service. It is easily extendible, and is very easy to use. FYI: THIS PROJECT IS INCOMPLETE AND I CURRENTLY HAVE NO PLANS TO FINISH IT. I DO NOT OFF
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Ride performance analysis from GPS data collected by Garmin Edge 305/205 or similar bicycle computers. You can chart the performance data of your ride such as speed and cadence, track totals from all your rides, view 3D rendering of your ride and more!
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Sk2Py is an wxPython-based IDE which assists in the migration of Cadence Skill(tm)-based PCells to Python PyCells for use in all Open Access environments. Please post any support requests or bug reports to the tracking system.
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A static timing analysis program written in C++. Cadence LEF/DEF definitions of circuit geometry and SDF definitions of circuit timing data of a synchronous circuit are compiled in order to generate timing constraints for non-zero skew circuit operation.
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Cadence is a collection of frameworks for accelerating J2EE. J2EE is complex and time consuming. Cadence makes building enterprise J2EE systems much easier by providing tools and frameworks to realize faster ROI. J2EE Nirvana indeed !!
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Advanced Software Configuration Management (SCM) for Cadence DFII. Delivers full Perforce capability to Cadence DFII using Best Practices for SCM. Please see http://public.perforce.com/public/perforce/cdsp4/index.html
