MiniLA logic analyzer software and hardware
VHDL FSM Generator, like the name says, is an application that will allow you to easily generate a finite state machine in VHDL without any (or very little) VHDL knowledge. The source code was programmed in Delphi 7.
Oscilloscope set top box for PC. There are many projects like that, but we want to try to design it in our way.
Wireless Sensor Node sniffer hardware front-end and GUI