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Top Apps

  • Cloud Communications for Remote Teams Cloud Communications for Remote Teams Icon
    Cloud Communications for Remote Teams Icon

    Packed with Features to Support your Businesses Needs

    • 100% uptime, Patented design
    • Simple DIY Setup with Award Winning Support
    • Superior HD audio and video quality
  • Take Advantage of O365 + Online Backup Bundles Take Advantage of O365 + Online Backup Bundles Icon
    Take Advantage of O365 + Online Backup Bundles Icon

    The Perfect Small Business Offer That Packages Productivity, Disaster Recovery & Security Under One Price Tag. Join SherWeb to Start Reselling.

    Add more value to your Office 365 offers with Online Backup. The program will back up servers, desktops, virtual machines and smart devices, plus popular applications and Office 365 data. Online Backup comes with the Active Protection feature embedded, making it possible to stop any ransomware attack and restore encrypted files in a blink. It also provides a web-based intuitive console that eases backup and disaster recovery management.
  • Controlix Icon

    Controlix

    An operating system written in RTL

    The Controlix operating system is written in RTL and is designed to be modular, synchronous, distributed, verifiable and retargetable.

    Downloads: 0 This Week Last Update: See Project
  • openSAFETY Demo Icon

    openSAFETY Demo

    An openSAFETY safe node demo application

    The openSAFETY Demo is an example implementation of an openSAFETY Safe Node (SN) with a simple GPIO application using POWERLINK as the underlying communication network. It is intended for people interested in openSAFETY and for evaluation purposes of openSAFETY. This demo only demonstrates the network capabilities and transport of openSAFEY frames. Additional software and hardware components are necessary to meet any necessary requirements demanded by notified bodies or related standards. The demo application consists of a part for handling the POWERLINK communication (POWERLINK Communication Processor, PCP), which is implemented on a FPGA platform and another part (application processor) executing the the user application, such as the openSAFETY stack and a sample application. ** The download of the openSAFETY Demo includes all sources and binaries for the FPGA part, as well as for the STMicro Nucleo-F401RE and Nucleo-F103RB development boards.**

    Downloads: 3 This Week Last Update: See Project
  • verilog_code_collection

    my personal verilog code collection

    some basic stuff, which might result in some electric drive, DSP, microprocessor code...

    Downloads: 0 This Week Last Update: See Project
  • Welec W2000a

    Firmware development/ improvement for the digital storage oscilloscope "Welec 2000a- series".

  • Synthesia synth platform

    Synthesia is an open hardware/software platform intended for creating standalone audio devices such as synthesizers on embedded processors.

    Downloads: 1 This Week Last Update: See Project
  • Monitor your Cisco ASA like an expert Monitor your Cisco ASA like an expert Icon
    Monitor your Cisco ASA like an expert Icon

    See how Network Insight™ for Cisco® ASA, a feature of SolarWinds Network Performance Monitor and Network Configuration Manager, can help.

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  • SUZAKU

    Project SUZAKU, home of software development based on SUZAKU FPGA board

  • Verilog Tool Framework

    vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.

    Downloads: 2 This Week Last Update: See Project
  • pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows to arbitrarily interconnect the available DSP modules and retrieve signal values on timescales below 1 ms. The graphical user interface (GUI) provides a realtime display of the various measurement instruments and allows the easy configuration of DSP signal chains and feedback controllers. At the highest abstraction level, arbitrary feedback sequences can be defined to fulfill tasks as complex as approaching and locking a resonance of a high-finesse Fabry-Perot cavity (tested up to finesse=100,000).

    Downloads: 23 This Week Last Update: See Project
  • OCM-PLD Source Code Repository Icon

    OCM-PLD Source Code Repository

    Unofficial firmware for 1chipMSX and Zemmix Neo machines by KdL

    Downloads: 0 This Week Last Update: See Project
  • ipdbg

    IPDBG are free tools to debug intellectual properties (IP cores).

    Downloads: 3 This Week Last Update: See Project
  • Find out what (or who) is slowing down your network Find out what (or who) is slowing down your network Icon
    Find out what (or who) is slowing down your network Icon

    Get comprehensive network bandwidth analysis and performance monitoring with SolarWinds® Bandwidth Analyzer Pack.

    Network slow, but you don't know the cause? Use Bandwidth Analyzer Pack (BAP) to monitor and analyze network bandwidth performance and traffic patterns. With BAP, you can identify which users, applications, and protocols are consuming the most bandwidth. You can also monitor Wireless LAN Controller traffic to see what applications and clients are using your wireless network. Try it free for 30 days!
  • Free tools and cores for FPGAs

    Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

  • VlibTools

    Tools and libraries for use with systemc and verilog

    Tool suite and libraries for developing system-c models. Tools for managing RTL projects.

    Downloads: 0 This Week Last Update: See Project
  • ghdl-updates

    GHDL - a VHDL simulator

    GHDL is the leading open source VHDL simulator. *** Now on github.com/tgingold/ghdl *** We have binary distributions for Debian Linux, Mac OSX and Windows. On other systems, getting GHDL from here means downloading the current source package and building GHDL from source. Alternatively you can get the latest source version (warning : occasionally unstable!) by pulling a snapshot from the git repository.

  • bel_fft Icon

    bel_fft

    FFT co-processor in Verilog based on the KISS FFT

    bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and the Wishbone bus are supported. However, bel_fft's architecture allows an easy adaptation to further bus architectures (e.g. AMBA AHB). It comes with a Java wizard to configure the co-processor and to generate all required files (e.g. twiddle ROMs). It comes with integration into Xilinx Vivado, EDK, and Altera QSYS and includes example designs for Xilinx Zynq and with PCI-Express core (including Linux driver and application). bel_fft is distributed under the GNU Lesser Public License 2.1.

  • SystemVerilog FrameWorks(TM)

    This is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.

    Downloads: 0 This Week Last Update: See Project
  • Notepad++ Verilog Plugin

    Verilog plugin for Notepad++

    Verilog processor for Notepad++. Current features: - Instantiate a module - Insert registers/wires from a module - Generate a test bench template - Automatically inserts a default header for a test bench - Insert a clocked always block v1.2.0 now supports ANSI and non-ANSI module declarations. To use this plugin, select the module declaration (including parameter and I/O definitions below for non-ANSI) and click SHIFT-CTRL-C. This selects the module and parses its components. After this, all other functions are available.

    Downloads: 88 This Week Last Update: See Project
  • VHDL Notepad++ Plugin

    VHDL Plugin for the Notepad++ Editor

    VHDL plugin based on http://sourceforge.net/projects/nppvhdlplugin/ This version is enhanced to include: - Insert Instantiation - Insert Signals - Create Test Bench Framework - Insert Component - Make comments Doxygen compliant - Create New Behavioral/Structural Entity Template - Create New Package File Template - Insert Synchronous Process - Insert Asynchronous Process - Insert a Default Header The default header is set in the vhdlConfig.txt file.

    Downloads: 107 This Week Last Update: See Project
  • adms Icon

    adms

    ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Repository migrated to: https://github.com/Qucs/ADMS For checkout do: git clone https://github.com/Qucs/ADMS.git

  • Project 2306 IDE Rad MacOS MCU DeveR Icon

    Project 2306 IDE Rad MacOS MCU DeveR

    Electronic design and programming tools suite like Eagle, MpLab

    Currently Only MacOS is Present, PreAlpha means not Ready to use, Application is provided Without Strict Garantee, License not OSI. All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned Features : Similar with mainstream market tools IDE and GUI Wrapper like : LabView©, Proteus©, MPLab©, Eagle CAD©, Tools Suite for Most Market Microcontroller. Tools suite for Arduino, Pinguino, Pic, AVR, ARM, Basic Stamp, Risc, other platform Fully Integrated IDE. Adobe PDF Help section SQL Connectivity Community Avail : https://www.facebook.com/Project-Core-2306-Nextgen-Eda-pcbradide-for-Mcumacoslinuxwindows-138250749681138/?fref=ts

    Downloads: 2 This Week Last Update: See Project
  • Open HD Video Capture Card

    This card will capture High Definition Video 1280x720 at 30fps, and soon be capable of 60fps and maybe even 1080p. This is a hardware project so source code, RTL, and board CAD files will be involved. All IC's and parts should be easily available.

    Downloads: 0 This Week Last Update: See Project
  • Labcoat: Cleanroom Apps for SuperWikia

    Labcoat; the VHDL graphic emulator.

    Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.

    Downloads: 0 This Week Last Update: See Project
  • lpACLib

    An Open-Source Library for Low-Power Approximate Computing Modules

    The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules (like adders and multiplier of different bit-widths) and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C and MATLAB to enable quality characterization. Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions. This open-source library facilitates research and development in approximate computing at higher abstraction levels, and to facilitate reproducible research and comparisons. In case of usage, please refer to our publication: Muhammad Shafique, Rehan Hafiz, Semeen Rehman, Walaa El-Harouni, Jörg Henkel, "Cross-Layer Approximate Computing: From Logic to Architectures", Design Automation Conference (DAC), 2016. Contributors: Authors, Vanshika Baoni, M. Abdullah Hanif http://ces.itec.kit.edu/lpACLib.php

    Downloads: 6 This Week Last Update: See Project
  • OpenSourceGym

    A software package that will combine different embedded computing platforms with home exercise equipment and a Qt client program in order to provide tracking of health and exercise performance.

    Downloads: 0 This Week Last Update: See Project
  • CMModelSim

    Cell Matrix Model Simulator

    Downloads: 0 This Week Last Update: See Project
  • Scheme-C-Verilog-Unlambda-NAND-Gates

    What would verilog code translated to unlambda look like? This question has puzzled me for a long time and I've decided to do a unlambda backend to my c->verilog compiler. Come to think of it, why stop at unlambda? I will go all the way to NAND gates.

    Downloads: 0 This Week Last Update: See Project
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