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Multimedia communications require efficient and real-time implementations of multirate digital signal processing systems.
An operating system written in RTL
A Decimal Counter written in VHDL controlled by some buttons.
Robert 2 is a robot, but doesn't exist yet. This project intend to develop all the software to build it
VHDL FSM Generator, like the name says, is an application that will allow you to easily generate a finite state machine in VHDL without any (or very little) VHDL knowledge. The source code was programmed in Delphi 7.
CPLD clone of the ZX-Spectrum 48K