OSI-Approved Open Source (48)
- GNU General Public License version 2.0 (27)
- BSD License (6)
- GNU General Public License version 3.0 (4)
- GNU Library or Lesser General Public License version 2.0 (4)
- MIT License (4)
- Academic Free License (3)
- Apache License V2.0 (2)
- Common Public License 1.0 (2)
- Apple Public Source License (1)
- Artistic License (1)
- Artistic License 2.0 (1)
- Common Development and Distribution License (1)
- GNU Library or Lesser General Public License version 3.0 (1)
- Open Software License 3.0 (1)
- Other License (3)
- Linux (48)
- Windows (43)
- Mac (31)
- Grouping and Descriptive Categories (24)
- Android (23)
- Modern (23)
- BSD (10)
- Audio & Video
- Business & Enterprise
- Home & Education
- Science & Engineering
- Security & Utilities
- System Administration
Profiling, Dynamic documentation, Prefabricated modules.21 weekly downloads
CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).1 weekly downloads
Electronic design and programming tools suite like Eagle, MpLab2 weekly downloads
Firmware development/ improvement for the digital storage oscilloscope "Welec 2000a- series".15 weekly downloads
Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.150 weekly downloads
Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.42 weekly downloads
Demo of Simulink to C++ C or HDL FGA for HFT potential1 weekly downloads
PVSim is a Portable Verilog Simulator for Mac OSX, Linux, and Windows. It features a fast compile-simulate-display cycle. The core is in C++, and the GUI, wxPython.35 weekly downloads
Scanning Probe Microscopy Controller and Data Visualization Software4 weekly downloads
GIAnT (Generic Implementation ANalysis Toolkit) is a platform for physical analysis of (embedded) devices. Primarily designed for hardware security analyses, it is built around an FPGA-based board for fault injection and side-channel analysis. This project has been supported by the German Federal Ministry of Education and Research BMBF (grant 01IS10026A, Project EXSET).1 weekly downloads
FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.21 weekly downloads
Open architecture GPU simulator and implementation
Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.
Network-on-Chip design exploration tool based on SystemC.
Cell Matrix Model Simulator
Open-source alternative partial reconfiguration flow for Xilinx FPGAs2 weekly downloads
HDL Analyzer and Netlist Architect (HANA): An open source analysis and synthesis tool for design written in Verilog 2001 HDL4 weekly downloads
The project uses the infrared camera from the wiimote to track hand gestures. This tracking is performed on an Altera DE2-70 FPGA
SHELLEY Software HardwarE Light LanguagE Yep !
This is a hardware/software simple USB Digital Storage Oscilloscope project.
FPGAmer is a framework to develop embedded games. Our development platform is the Xilinx University Program Virtex-II-Pro but not limited to that. FPGAmer includes custom hardware components plus a custom software framework and some sample games.
A software package that will combine different embedded computing platforms with home exercise equipment and a Qt client program in order to provide tracking of health and exercise performance.1 weekly downloads
This is the source code for examples from my blog at http://wburris.com/
This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.