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- Programming Language: VHDL/Verilog ×
Software to support the JTAG bus (IEEE 1149.1). Primary purpose is for a JTAG programmer/debugger using FPGA's to provide ability to test and program JTAG devices.
Open architecture GPU simulator and implementation
A software package that will combine different embedded computing platforms with home exercise equipment and a Qt client program in order to provide tracking of health and exercise performance.
Design and implementation of silicon and software for baseband processors conforming to IEEE wireless standards. Initial focus on WiMAX and WiFi.
The main target of this project is to create a Open Source System on Chip generator for FPGA. This generator will use following technologies: Python, Wishbone SoC bus specifications and VHDL.
This is a hardware/software simple USB Digital Storage Oscilloscope project.
Ospu is a soft processor for FPGA.
A methodology to create netlists for printed circuit board layout using a novel PCB specific HDL as the source language.
Attempt to implement DEC PDP-11 minicomputer in Xilinx FPGA
Programmable Electronic Controller
Code and documentation for the PSU Mars Society Rover
Palette for computer architecture design
Parallelsimu provides interfaces for parallel simulation of RTL descriptions of complex hardware designs(SoCs, CPUs and etc.) written in Verilog HDL.
Framework for Adaptive Hardware Concurrent Systems with DPR-FPGAs
A simple processor which has an 8-bit data bus and a 13 bit address bus. The memory is 8192 x 8, instructions are 8 or 16 bits wide, and all opcodes are 3 or 4 bits wide.
Ray Tracing micro-processor RTMP. Features: * Programmable pixel shaders. * SIMD 32-bit ALU. * Hardware support for Octree scene traversal. * Ray intersection cache. * Support for mutiple instances of RTMP working concurrently.
A Verilog design for a simple ASIC that executes the Ray Tracing Algorithm.
Este proyecto es una iniciativa para reconstruir la plataforma PUMA MA2000 de la empresa TeQuipment ltd. por medio de la implementación de un sistema empotrado basado en tecnología FPGA.
Collection of VHDL libraries for ASIC/FGPA development
Robert 2 is a robot, but doesn't exist yet. This project intend to develop all the software to build it
SAP1 is a small didactic processor created by professor Malvino.
Toolkit to use the SASEBO GII boards more efficiently
Project SUZAKU, home of software development based on SUZAKU FPGA board
A VHDL - Verilog SAD256 module