Search Results for "test case generation"
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Showing 2 open source projects for "test case generation"
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liblabpro
Open-source access to Vernier LabPro devices
liblabpro is a cross-platform C library for controlling and collecting data from Vernier LabPro devices. It is currently in an early work-in-progress stage and is not affiliated with Vernier in any way. As a test case, it also includes a basic program, labpro-console, for communicating with a LabPro using its plaintext command system. -
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FPGAsm
Create fast bare-metal FPGA designs without Verilog or VHDL
FPGAsm is a low-level alternative to verilog and VHDL. A near-instant 'assembler for FPGAs', this simple yet powerful language facilitates bottom-up design, layout and wiring of modules, and generation of .xdl output. With about 10 keywords to learn, you can start making circuits in minutes. Now you can focus on learning the ins and outs of the FPGA instead of complex tools and languages. Fast turnaround time and bottom-up approach invite exploration, experimentation, live circuit testing and physical test harness creation, radically changing the workflow. ...
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