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Simple single cycle processor based on triadic Harvard architecture.
A 32-bit MIPS simple single cycle processor based on triadic Harvard architecture with a RISC-like ISA.
This project is done in Cairo University-Faculty of Enigneering, Electronics and Electrical Communication department (EECE-2017)
Automate the management of Cisco switches out-of-band (OOB) for extra security and reliability. Uses serial ports; version 2 is thread-safe and supports multiple switches.
Tecnodiscap group (http://tecnodiscap.unizar.es) from University of Zaragoza (http://www.unizar.es) belongs to I3A Research Institute (http://i3a.unizar.es/) and is developing tools for Assitive technologies. Zigbee Driver. Osgi4ami Interfaces. User
This work is developed for my thesis in computer science at University of Bologna under the guide and support of my supervisor prof. Renzo Davoli: it is a software oscilloscope, more precisely a program for data visualization coming from "microscope"
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