Search Results for "tasks"

...High-Speed external PAC-PLL hardware option with digital DSP link. Based on several hardware options it supports a commercially available DSP hardware and provided also Open Source Code for all the low level signal processing tasks and instrument controls in a most flexible and adaptable manner. All latest software is available via github.com/pyzahl/Gxsm4 (source code) or as binary for Ubuntu on https://launchpad.net/~totto/+archive/ubuntu/gxsm

culfw is a GPL'd firmware for the CUL family of devices from http://busware.de. culfw is used in conjunction with the CUL/CUN/CUR and a high level software like fhem to automate some common tasks in the household like switching lamps / shutters / heating / etc. and to log events like temperature/humidity/power consumption. culfw supports following RF protocols: "SlowRF" mode: FS20: send/receiveo, FHT: send/receive, S300: receive, EM1000: receive, HMS: receive, Hoermann: receive. ESA2000: receive, Lacrosse TX2/TX3: receive, Intertechno: send BidCos(R) in the "AskSin" mode (20kHz datarate, FM). ...

...The Duration of the Project was 15-20 Days wherein we had to develop the driver library for the Watchdog Timer on LPC1114 and incorporate the same into FreeRTOS. The services of the driver are exported using the UNIX like read, write, Open and ioctl system calls used by the various tasks in the FreeRTOS environment to register with the Watchdog service. The Watchdog service itself is a task running as an idle task hook and services the watchdog on behalf of all the tasks that are registered with our driver. The driver would reset the system if any of the registered tasks do not perform as they should. This is a student Project, a team of 5, There are some corner cases here and there which would be eliminated gradually.

Agnix is a small operating system kernel for i386, supporting 32-bit protected memory mode, paging, hardware switched tasks, memory tests, PCI bus, devices, PCI IRQ routing, RT timers and network protocols.

FpgaC compiles a subset of the C language to net lists which can be imported into an FPGA vendors tool chains. C provides an excellent alternative to VHDL/Verilog for algorithmic expression of FPGA reconfigurable computing tasks. More info in wiki.

A lightweight, simple and easy to use embedded system task scheduler. RataOS is written as a high level C, with a simple HAL & API structure, allowing it to be ported between embedded devices easily.

MEA is an abstraction layer and API between vendor-specific measurement and instrumentation drivers and test applications that use them. All hardware-specific tasks are done by dynamically linked adapter modules.

Software and electronics hardware for concentrated solar power. A mix of code, electronics and sensor designs for tracking the sun to harvest solar power and related tasks.

...The source code is available in the SVN repository: https://sourceforge.net/p/xrt/code/6/tree/trunk/ and consists in two folders: 1) /X-RT : A portable multiprocessor scheduling framework supporting scheduling periodic real-time tasks according to the G-EDF (Global Earliest Deadline First) scheduling platform. Current version supports major POSIX systems (Linux, QNX). 2) Hardware_GEDF_Scheduler: is a hardware implementation in VHDL (targeting FPGAs) of the G-EDF multiprocessor scheduling policy.