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...The processor is a pipelined architecture clocked at 100 MHz in a Cyclone II speed grade -6. Therefore it can be seen as similar to a 486 in real mode.
Several peripherals are also implemented in a somewhat minimalistic way, but enough to be able to boot an IBM PCXT compatible bios and MSDOS 6.22. The current implementation is only proven to boot the bios and DOS in simulation. The system is targeted to run on the DE2-70 board. In order to run the system in hardware a SDRAM and SRAM controller need to be added. These are currently in development.
This is a simulation of an open CPU, called 67-80-85. It tries to implement a simple, efficient CPU. It includes the simulator, an assembler, a sample code for a bootloader (ROM), a microkernel prototype and tests. - "The 3-legged shinning steel horse
Embedded PowerPC Bootloader Project, especially for Embedded PowerPC boards.
The code for this project is frozen. Development continues with the "U-Boot" project
(Universal BootLoader, see http://sourceforge.net/projects/u-boot ).
PROJECT IS DISCUNTINUED This project is about to contain information how to write data like bootloader into various flash devices on diffrent CPUs trough JTAG interface
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