Showing 3 open source projects for "re-tools"

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    Chipyard

    Chipyard

    An Agile RISC-V SoC Design Framework with in-order cores

    Chipyard is a framework and generator for constructing custom RISC‑V SoC hardware. Built at UC Berkeley, it leverages Chisel/FIRRTL to generate full-stack systems—from CPU cores to peripherals—and includes simulators, FPGA deployment tools, and integration with Rocket Chip and other RISC‑V ecosystems.
    Downloads: 3 This Week
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    Play Framework

    Play Framework

    A high velocity web framework

    Play Framework makes it easy to build web applications with Java & Scala. The Play Framework combines productivity and performance making it easy to build scalable web applications with Java and Scala. Play is developer friendly with a "just hit refresh" workflow and built-in testing support. With Play, applications scale predictably due to a stateless and non-blocking architecture. By being RESTful by default, including assets compilers, JSON & WebSocket support, Play is a perfect fit for...
    Downloads: 6 This Week
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  • 3
    Rocket Chip

    Rocket Chip

    Rocket Chip Generator

    Rocket Chip is a parameterized RISC-V SoC generator written in Chisel that produces synthesizable RTL for a wide range of cores and configurations. At its heart is the Rocket core, a simple, in-order, five-stage RISC-V implementation, but the generator composes much more: coherent caches, MMUs, interrupt controllers, and buses via the TileLink interconnect. A diplomacy framework (LazyModules) lets designers wire components with negotiated parameters, enabling reuse and rapid exploration of...
    Downloads: 1 This Week
    Last Update:
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