Search Results for "computer based exam"

Build, Design and Test your network in a risk-free virtual environment and access the largest networking community to help. Whether you are studying for your first networking exam or building out a state-wide telecommunications network, GNS3 offers an easy way to design and build networks of any size without the need for hardware.

A Virtual Machine based on a Simplified Instructional Computer (SIC). The Machine will emulate all the hardware of a SIC and will be able to run any program that is written for the SIC as described by Leland L.Beck in his book "System Software"

MIPS R3000-based virtual machine with support for serial console and GNU cross-compiler tools.

The Beagle Entertainment System (BES) project is a complete filesystem image that turns the ARM-based BeagleBone Black single board computer into an embedded appliance capable of playing software for the SNES, NES, GBA, and Gameboy Color platforms. A full system image, ready to be written to a microSD card and used as-is, is available for download. Just connect your BES-enabled BeagleBone Black to your network and you can use BES's Node.js web interface to add or remove ROMs, configure gamepads, and edit ROM descriptions for the front-end GUI. ...

ArchC is an open-source architecture description language based on SystemC. Its goal is to provide designers with a tool to evaluate new ideas in processor and ISA design, memory hierarchy, etc. and other aspects of computer architecture research.

MPS and µMPS are general-purpose computer system simulators based on MIPS R3000 processor. Both feature a X Window user interface, documentation, and a development kit. They have been successfully ported on several platforms.

YASP (Yet Another Simple Processor) is a 8-bit microprocessor with microcontroller capabilities (I/O ports, REQ, ACK) that can be used as a small computer for educational purposes. Its development environment includes simulators and assemblers.

Simulator of massively parallel computer cluster with minimal nodes. Loosely based around available information regarding Chuck Moore's c18/25x core/chip designs. Machine Forth based MISC NOSC nodes, mesh interconnection.