Showing 3 open source projects for "set"

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    PlatformIO Core

    PlatformIO Core

    Professional collaborative platform for embedded development

    PlatformIO is a professional collaborative platform for embedded development. A place where Developers and Teams have true Freedom! No more vendor lock-in! A user-friendly and extensible integrated development environment with a set of professional development instruments, providing modern and powerful features to speed up yet simplify the creation and delivery of embedded products. A lightweight but powerful cross-platform source code editor. Smart code completions are based on variable types, function definitions, and library dependencies. Multi-projects workflow with easy navigation around project codebase, multiple panes, and themes support. ...
    Downloads: 17 This Week
    Last Update:
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  • 2
    wolfSSL
    The wolfSSL embedded SSL library (formerly CyaSSL) is a lightweight, portable, C-language-based SSL/TLS library targeted at IoT, embedded, and RTOS environments primarily because of its size, speed, and feature set. It works seamlessly in desktop, enterprise, and cloud environments as well. wolfSSL supports industry standards up to the current TLS 1.2 and DTLS 1.2, is up to 20 times smaller than OpenSSL, offers a simple API, an OpenSSL compatibility layer, OCSP and CRL support, is backed by the robust wolfCrypt cryptography library, and much more. ...
    Downloads: 18 This Week
    Last Update:
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  • 3

    pyCPU

    Python Hardware Processor

    The Python Hardware Processsor is a implementation of a Hardware CPU in Myhdl. The CPU can directly execute something very similar to python bytecode (but only a very restricted instruction set). The Programm code for the CPU can be written directly in python (very restricted parts of python). This code is then converted by a small python programm to this restricted python bytecode. Since the hardware description is also in python, the slightly modified bytecode an then automatically loaded into the CPU design. The result can be converted to VHDL or Verilog
    Downloads: 0 This Week
    Last Update:
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