2 projects for "set" with 2 filters applied:

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  • 1
    cMIPS

    cMIPS

    cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core

    ...The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5% logic registers.
    Downloads: 0 This Week
    Last Update:
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  • 2
    SimpleTimer AS
    SimpleTimer is a Java-based, freeware tool, you can use as a countdown timer on your mobile device. This software is compiled and tested on devices with OS Symbian S60 2nd FP3 edition e.g. on NOKIA N70. Should work on other platforms too!!!
    Downloads: 1 This Week
    Last Update:
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