Search Results for "jd-core"
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Showing 6 open source projects for "jd-core"
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Application Monitoring That Won't Slow Your App DownFull APM with errors, performance, logs, and uptime monitoring. 99.999% uptime SLA on the platform itself.
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Enterprise-grade ITSM, for every businessFreshservice is an intuitive, AI-powered platform that helps IT, operations, and business teams deliver exceptional service without the usual complexity. Automate repetitive tasks, resolve issues faster, and provide seamless support across the organization. From managing incidents and assets to driving smarter decisions, Freshservice makes it easy to stay efficient and scale with confidence.
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pFFh
a self-contained development environment for embedded systems.
pFFh is a programming language that allows you to launch applications on embedded systems safely, quickly and comfortably. pFFh runs on the target system, combining operation as a command interpreter and code compiler. We can say that pFFh behaves like an operating system on the board under development. All pFFh needs is a serial or USB-serial channel to communicate, and through it, receive and process console commands, either from a keyboard or from files sent from a desktop computer. At... -
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Simple STM32 Run
Run STM32 with simple examples
By remove dependency to complex STM32 library, each package try to give a simplest code clip drive STM32 working with particular functionality. Supported Core: STM32F107VC -
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Pharos
RTOS for Secure, Safe and Real-Time Systems
Pharos is a free open-source RTOS for secure, safe and real-time systems with the following characteristics: - Memory and enhanced time partitioning (TSP) - Native support for sporadic, periodic and aperiodic threads - Fixed-priority preemptive scheduler - Execution time protection (threads are prevented from executing for more time than they are configured to) - Small size (full image has ~100 to 300KiB text, ~30KiB data) - Hard real-time determinism - Fast critical sections -... -
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cMIPS
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips The code here is no longer up to date. The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5%... -
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Jari OS is a real-time microkernel operating system which runs in terms of multi-service architecture. Core system consists of its own microkernel μString, core and system services, set of device drivers launched as trusted services.
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Kmax 8bit microkernel for AVR ATMega MCUs written in assembler (AVRASM & GCC compatible) with a C API. Core features include priority-based preemptive round-robin scheduling, mutexes, fifos and semaphores with a focus on speed and ease of use.
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