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    Pharos

    Pharos

    RTOS for Secure, Safe and Real-Time Systems

    Pharos is a free open-source RTOS for secure, safe and real-time systems with the following characteristics: - Memory and enhanced time partitioning (TSP) - Native support for sporadic, periodic and aperiodic threads - Fixed-priority preemptive scheduler - Execution time protection (threads are prevented from executing for more time than they are configured to) - Small size (full image has ~100 to 300KiB text, ~30KiB data) - Hard real-time determinism - Fast critical sections - Prioritized nested interrupts - inter-partition communication with filters to protect unwanted access - Multicore support (RMP) - Supports ARM9, Cortex-A/R/M and Aarch64, RISC-V64 (64 bits) - The complete TestSuite (see below information) is run successfully for each platform in each release - Tested: more than 170 KLOC of requirement-based tests, executed for each board at each release - Up-to-date User Manual also available See our wiki page for more information.
    Downloads: 2 This Week
    Last Update:
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  • 2
    cMIPS

    cMIPS

    cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core

    This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips The code here is no longer up to date. The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5% logic registers.
    Downloads: 0 This Week
    Last Update:
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