Search Results for "ofn-extract-objects.py"

This parser has been developed to help users to implement their Verilog tool/utility on the top this library. It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the users...

This parser has been developed for those who wants to develop his/her own tool around VHDL RTL. Only synthesizable subset of VHDL is supported and it may not work for machine/tool generated VHDL files. This parser has been developed in Java in order to make it platform independent. It reads RTL and populates its internal object model. There are APIs to extract the design information from the database, APIs to elaborate the design along with expression evaluation capabilities. This tool has been...

The ADS It s a process of analysis, permits to extract or to verify the properties of a system analog or digital system.

Decodify is a simple program that parses a numerical string and extracts different parts of it as per user query. The main application of 'decodify' is to extract parts of a control bus in logic simulation, but many other uses are possible.