Search Results for "run time java"

WARNING: This project is under hard development and not intended for productive use yet but only for discussion. jCLS helps to create and maintain fine detailed component libraries for EDA tools like Altium Designer. It provides tools for data generation for masses of single parts from only the most necessary informations. Having good maintained and rich described and voluptuous detailed component libraries needs normally masses of time, work and discipline. jCLS comes here to save you...

Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design

JReliability allows to derive several reliability-related measures like Mean-Time-To-Failure (MTTF) or Mission-Time (MT) of complex systems that are modeled using Boolean functions, efficiently encoded in Binary Decision Diagrams (BDDs).

...The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual" prototypes of systems or processes to demonstrate their behavior prior to building physical prototypes. The user builds his system model by selecting predefined blocks from a block library and simply wiring the blocks together. ...

TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.

XSpiceHDL, an XSpice-VerilogHDL co-simulator incorporates a Schematic Capture GUI, modified run-time DLL capable XSpice3f5 based engine with Berkley Sockets IPC via CodeModel & PLI 1.0/2.0(VPI) DLLs, all in C++, wxWidgets & MSVC++ 6.0.