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CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files.
Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
IMPORTANT: The flosslogic project has merged with the sigrok project. Development continues in the sigrok wiki, mailing lists, IRC channel, and git repository.