Search Results for "x11-basic"
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Showing 92 open source projects for "x11-basic"
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Stop Storing Third-Party Tokens in Your DatabaseRolling your own OAuth token storage can be a security liability. Token Vault securely stores access and refresh tokens from federated providers and handles exchange and renewal automatically. Connected accounts, refresh exchange, and privileged worker flows included.
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AI-powered service management for IT and enterprise teamsGive your IT, operations, and business teams the ability to deliver exceptional services—without the complexity. Maximize operational efficiency with refreshingly simple, AI-powered Freshservice.
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Ngspice project aims to improve the spice3f5 circuit simulator.
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VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.
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XSCHEM
Schematic circuit editor for VLSI and Mixed mode circuit simulation.
Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this... -
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A portable loudspeaker design system supporting measurement, modeling, simulation and optimization of boxes, filters and systems.
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Earn up to 16% annual interest with Nexo.Generate interest, borrow against your crypto, and trade a range of cryptocurrencies — all in one platform. Geographic restrictions, eligibility, and terms apply.
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wxArt2D gives wxWindows applications sophisticated vector drawing functionality. It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.
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System Verilog Parser IEEE 1800 LRM
IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API
...It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the users that they will be able to extract every bit of design information from the parsed database. The source code of that application can be shared upon request. ... -
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NetworkDesigner does the design of various impedance matching networks. The designs are useful for both solid state designs as well as vacuum tube/valve circuits. In the newest version, the filter design functionality has been split off and will appear as a separate app. This makes for a cleaner user interface, The latest version was made from the FOX toolkit, and it is included in the package. This is the latest stable version of FOX.
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FXtransformer Designer is a graphical design aid for both power and RF transformers. RF Design: Broadband, Single-Tuned, Double-Tuned.
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PCB is a tool for the layout of printed circuit boards. PCB can produce industry standard RS-274X and Excellon NC-Drill format output for submission to board manufacturers.
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Streamline Azure Security with Palo Alto Networks VM-SeriesImprove your security posture and reduce incident response time. Use the VM-Series to natively analyze Azure traffic and dynamically drive policy updates based on workload changes.
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GLogic
A logic gate simulator for linux developed with Gtk and python.
GLogic is a logic gate simulator for linux and an adaptation of the gLogic package.... -
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Transistor
Exploiting Mox Software "Bipolar Transistors" database
It requires db.sqlite database and images folder containing transistor's implementation pin Bipolar Transistor Database from Mox Software is not available anymore. As on many download websites it was mentioned as open sources (but no source available) I decided to rebuild if almost from scratch. As a transistor database may be useful i decide to share what I've done. It has been written in Purebasic because IDE is free till 800 lines of code written, and mainly because it's very... -
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megatest
Run tasks/tests, get trustworthy pass/fail info rolled up
Distributed test running system. build for running simulations, quality assurance or similar where you need to run a large number of tests. Supports dependencies, iteration, disk space management and log file analysis. -
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Penthode
Penthode simulates, draw and plot electrical power distributions
Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design -
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Project 2306 IDE Rad MacOS MCU DeveR
Electronic design and programming tools suite like Eagle, MpLab
...All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned Features : Similar with mainstream market tools IDE and GUI Wrapper like : LabView©, Proteus©, MPLab©, Eagle CAD©, Tools Suite for Most Market Microcontroller. Tools suite for Arduino, Pinguino, Pic, AVR, ARM, Basic Stamp, Risc, other platform Fully Integrated IDE. Adobe PDF Help section SQL Connectivity Community Avail : https://www.facebook.com/Project-Core-2306-Nextgen-Eda-pcbradide-for-Mcumacoslinuxwindows-138250749681138/?fref=ts -
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
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PCBColorizer
Automatic coloring PCB - make a color circuit board for installation.
The program is designed for automatic coloring schemes of printed circuit boards for ease of installation. For its work requires some files with information on the printed circuit board, package generated by P-CAD. The basic principle: each type of component (identical components) are marked with a unique symbol that has its own color and style. This simplifies the visual search component on the board. The program also generates a text list of components, where the marks, what type of components is associated with which character on the circuit board. -
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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
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esweep is a scriptable audio measurement program which features various signals and signal processing functions. Its main purpose is the measurement of speakers.
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O Projeto Cleusa - É uma interface de Gerenciamento de dispositivos. O projeto ROSANA aciona ações nos relês. O projeto Cleusa utiliza uma dispositivo de Hardware especifico, porem pode ser compatibilizado com qualquer outro hardware.
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ReliaFree is a Python and PyGTK based suite of tools to assist in Reliability, Availability, Maintainability, and Safety (RAMS) analyses. ReliaFree is intended to be an Open Source alternative to proprietary RAMS analyses solutions.
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Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
