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CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files.
Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
The Sampa library is a comprehensive C++ library and lua toolset to simulate and analyze system on chip architectures through fast cycle accurate transactional level simulation. Tags: ESL, SoC, NoC, TLM, interconnect, IP, SystemC. More on sampalib.org
Liquid PCB is a Computer Aided Design (CAD) application for designing Printed Circuit Boards. It is unlike any PCB CAD package you have used before. It has innovative user interface, and lets you create freeform tracks without any straight lines.
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IMPORTANT: The flosslogic project has merged with the sigrok project. Development continues in the sigrok wiki, mailing lists, IRC channel, and git repository.