Open Source Java Electronic Design Automation (EDA) Software

A multiplatform vector drawing program with a complete library of electronic symbols. Schematics and drawings are stored in a very compact text format. There is no netlist concept behind the drawings (so no simulation, and this is a choice) but this allows a great graphical flexibility and ease of use, making FidoCadJ the perfect tool for exchange sketches in forum and newsgroup discussions with a few clicks. Drawings can be exported in several graphic formats, such as pdf. Follow the development live on Twitter: https://twitter.com/davbucci

Circuitmod is a circuit simulator that extend the capacity of the original Falstad's Java Circuit Simulator into CMOS Chips, Led Arrays, Led Matrix and PIC Programming. The Horizon is limitless. Try today.

DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to design Combinational, Synchronous and Asynchronous Sequential Circuits. The circuit working can be analyzed by using output parts like LEDs, Seven Segment Display as well as CRT and digital Oscilloscope all provided in the software. This Software may be used by professionals, hobbyists and students alike. The teachers may incorporate this software in their courses like Digital Logic and Computer Design, Computer Architecture, Computer Organization and Embedded Systems.

SVEditor is an Eclipse-based IDE (Integrated Development Environment) for SystemVerilog and Verilog files. It features syntax coloring, content assist, source indent and auto-indent, and structure display.

The DigitalSimulator is your Virtual Electronics Lab, allowing you to design, simulate and output your digital circuit board designs.

Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.

JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual" prototypes of systems or processes to demonstrate their behavior prior to building physical prototypes. The user builds his system model by selecting predefined blocks from a block library and simply wiring the blocks together. Each block of the diagram performs a function. Users can also create custom blocks in Java and add them to the JMCAD block library. JMCAD is a block diagram language for creating complex nonlinear dynamic systems.

TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.

HDLObf is intended to be a HDL Obfuscator and identifier name change utility. Primarily designed for Verilog/SystemVerilog support will be added for VHDL/SystemC in future.

DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code

Netsim is a mobile ad hoc network simulator targeted at large heterogeneous node configurations. It is written in Java and is easily extensible through its modular concept.

Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).

Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox

CircuitSmith is to be a comprehensive electronic design package being developed in Java which will include schematic capture, printed circuit board layout and any other features which I (and hopefully others) can be bothered to program.

Ycad is a library of CAD functions in Java. Currently only DXF is supported for reading, viewing and writing. The DXF drawing may be rendered to a Graphics object for printing or imaging.

Java Quine McCluskey (JQM) implements the Quine-McCluskey algorithm with Petrick’s Method for minimizing Boolean functions. Designed for both education and industrial application, it handles up to 16 variables and functions. Uniquely, JQM bridges the gap between theory and practice: it visualizes the solution process with generated Karnaugh Maps for students, while supporting PLC engineers by exporting results to Structured Text (ST) and Ladder Diagram (LD). The software includes a GUI for managing truth tables and supports diverse file formats for import and export.

The aim of this project is to develop a GDSII viewer by using Java programming language. Efforts will be made especially on ease-of-use, efficiency, and capacity.

Power consumption analysis tools for embedded systems. MARTE to AADL model transformation with ATL for tools interoperability. More info on the project at http://sourceforge.net/apps/trac/lab-sticc/

PCB Layout and Schematic capture tool for Win/Linux/Mac. Source code at https://github.com/sergei-iliev/myNetPCB

Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support. ipxact2verilog - Generate Verilog module from IP-XACT definition ipxact2vhdlentity - Generate VHDL entity from IP-XACT Component definition verilog2ipxact - Generates IP-XACT definition from Verilog modules vhdl2ipxact - Generates IP-XACT definition from VHDL source ipxactcoherencycheckerverilog / ipxactcoherencycheckervhdl - Validates IP-XACT Component definition with RTL validateipxact - IP-XACT Linting tool

This is a very powerful Schematic and PCB layout tool for electronic Engineer. It is very easy to use. Coming version will add the SPICE features as well as the 3D model. This tool is target for single user, so all the things such as Schematic, PCB layout, SPICE model, 3D models are all combined into a single project file "*.prj" in ZIP file format. Anyone should able to explore and see the structure of files using any zip tool.

This program provides for easy modification and viewing of SPICE circuit files. It will also read SPICE3 RAW format (as well as GnuCap) and create graphs of results through an interactive GUI. It supports waveform math, copying to clipboard, and saving.

This project provides a analog / mixed signal IC schematic capture and layout tool with the accompanying netlisters, simulators, and verification tools.

The PARSEC CEE is the primary achievement of several years of effort at NASA's Marshall Space Flight Center. The CEE was developed to allow engineers in the Advanced Concepts Department to rapidly prototype launch vehicle and spacecraft concepts.

Pipes is a desktop system which analyzes an AutoCad(TM) drawing of a sprinkler system, checks for flaws and after these are eliminated, adds the size/diameter labels to the drawing. Tutorial: http://users.norwoodlight.com/janh/wink/autopipes-entry.htm