Open Source ChromeOS Electronic Design Automation (EDA) Software

Ngspice project aims to improve the spice3f5 circuit simulator.

Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Transient, Noise and Harmonic Balance analysis. Pure digital simulations are also supported.

UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.

Circuitmod is a circuit simulator that extend the capacity of the original Falstad's Java Circuit Simulator into CMOS Chips, Led Arrays, Led Matrix and PIC Programming. The Horizon is limitless. Try today.

A multiplatform vector drawing program with a complete library of electronic symbols. Schematics and drawings are stored in a very compact text format. There is no netlist concept behind the drawings (so no simulation, and this is a choice) but this allows a great graphical flexibility and ease of use, making FidoCadJ the perfect tool for exchange sketches in forum and newsgroup discussions with a few clicks. Drawings can be exported in several graphic formats, such as pdf. Follow the development live on Twitter: https://twitter.com/davbucci

DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to design Combinational, Synchronous and Asynchronous Sequential Circuits. The circuit working can be analyzed by using output parts like LEDs, Seven Segment Display as well as CRT and digital Oscilloscope all provided in the software. This Software may be used by professionals, hobbyists and students alike. The teachers may incorporate this software in their courses like Digital Logic and Computer Design, Computer Architecture, Computer Organization and Embedded Systems.

TimingEditor is a tool to graphically draw and edit timing diagrams.

A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.

GHDL is the leading open source VHDL simulator. *** Now on github.com/tgingold/ghdl *** We have binary distributions for Debian Linux, Mac OSX and Windows. On other systems, getting GHDL from here means downloading the current source package and building GHDL from source. Alternatively you can get the latest source version (warning : occasionally unstable!) by pulling a snapshot from the git repository.

GNU SPICE GUI provides a GUI front-end for various freely available electronic circuit simulation engines ie. NG-SPICE and GNU-CAP. It's core function is to generate simulation engine instructions based on user input. However, it also offers extra functionality via applications and utilities developed by others. Electronic Design Automation (EDA) tool suites are used to provide schematic capture and editing, and schematic to netlist conversion. Waveform data viewers are used to display simulation results and PDF viewers to display user manuals.

This project aims to develop an opensource software with an attractive and efficient GUI which allows to design linear electronic circuits and to characterize existing ones.

A package for transient and steady state simulation of organic solar cells.

Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.

JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual" prototypes of systems or processes to demonstrate their behavior prior to building physical prototypes. The user builds his system model by selecting predefined blocks from a block library and simply wiring the blocks together. Each block of the diagram performs a function. Users can also create custom blocks in Java and add them to the JMCAD block library. JMCAD is a block diagram language for creating complex nonlinear dynamic systems.

Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

InSystem Serial Programmer Fujitsu MCU F2MC-16LX and FR series.

'atlc' is a CAD package used for analysing and desiging electrical transmission lines of arbitrary cross section. Also for the design of directonal couplers. Some parts are CPU intensive, so multiple CPUs are supported.

Wcalc is a tool for the analysis and synthesis of electronic components. Some of the models include coupled microstrip lines, single layer air core solenoid inductors, etc. Wcalc can analyze the electrical parameters based on the physical dimensions a

"Magic" VLSI layout tool and various incarnations of the Berkeley tools.

Netsim is a mobile ad hoc network simulator targeted at large heterogeneous node configurations. It is written in Java and is easily extensible through its modular concept.

The Decision Procedure Toolkit (DPT) is a system of cooperating decision procedures for answering satisfiability queries. The DPT implementation in OCaml comprises a DPLL-style SAT solver with theory-specific decision procedures.

An object-oriented Python Interface to Frontline PCB's Genesis 2000 CAD/CAM/CAE system.

The aim of this project is to develop a GDSII viewer by using Java programming language. Efforts will be made especially on ease-of-use, efficiency, and capacity.

DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code

Ycad is a library of CAD functions in Java. Currently only DXF is supported for reading, viewing and writing. The DXF drawing may be rendered to a Graphics object for printing or imaging.