Search Results for "clip-4-win"

Ngspice project aims to improve the spice3f5 circuit simulator.

gputils is a collection of tools for Microchip PIC microcontrollers. Its goal is to be fully compatible with Microchip's tools, MPASM, MPLINK, and MPLIB.

gpsim is an open sourced simulator for Microchip's PIC microcontrollers. It supports all three families of PICs: 12-bit, 14-bit, and 16-bit cores. See also gputils http://gputils.sourceforge.net/

A package for transient and steady state simulation of organic solar cells.

v21.06.008 Complete implementation of iec 104 protocol standard including File transfer. Make your RTU, protocol converter, Gateway, HMI, Data concentrator compatible with iec 104. *Industry Proved * Worldwide Customers Download Evaluation Kit - IEC 104 Development Bundle In the Development Bundle, We included IEC 104 Server & Client Simulator, Windows & Linux...

UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.

Gwave is a waveform viewer for the output of analog electronic circuit simulators such as spice. It displays the data as 2-D plots, and allows for interactive scrolling, zooming, and measuring of the waveforms.

Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.

This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).

ArchC is an open-source architecture description language based on SystemC. Its goal is to provide designers with a tool to evaluate new ideas in processor and ISA design, memory hierarchy, etc. and other aspects of computer architecture research.

"kdiv" is a generator of routines for optimized division by an integer constant based on the work presented in H.S. Warren's "Hacker's Delight". "kdiv" can be used to emit a generic assembly or C implementation of (signed/unsigned) division.

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.

An Electronic Definition Interchange Format (EDIF) parser which allows exports from one EDA schematic capture system (such as OrCad) for import into another (such as KiCad)

This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux.

lilpM32 is a MIPS-like processor designed in Logisim, assembler program and documentation for them. Complete assembler and fully functional instruction set with I/O and subroutines features allow to write full-blown complicated programs.

During the period from 1990 through 2002, EPRI funded the development of a Lightning Protection Design Workstation (LPDW), which was used by many utilities to assess the lightning performance of distribution lines. Since about 2002, this program has not been available. EPRI decided to release the simulation kernel of LPDW under an open-source license (GPL v3), so it may be incorporated into IEEE Flash and other projects. OpenETran can presently simulate multi-conductor power lines,...

esweep is a scriptable audio measurement program which features various signals and signal processing functions. Its main purpose is the measurement of speakers.

This project has moved to http://sourceforge.net/projects/ngspice-ext.

FpgaC compiles a subset of the C language to net lists which can be imported into an FPGA vendors tool chains. C provides an excellent alternative to VHDL/Verilog for algorithmic expression of FPGA reconfigurable computing tasks. More info in wiki.

Framework for the Analysis and Modification of EDIF netlists (FAME) is a C++ framework, developed at Politecnico di Torino, aimed at automating the analysis and modification of complex circuit netlists described in the standard EDIF 2.0.0 language.

This is a Traffic Light with capability of controlling 4 sets of Lamps and Passengers light with one Counter and LCD for displaying the Time for every set of red light.

ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.

LSim is a software for simulation and make executables to ARM Cortex-M3 mcu from logic gates diagram. LSim can compile logic gates diagram and generate binary executable files (*.bin, *.hex) for cortex-m3 mcu´s (LPC1768, under development).

pgmtokicad is a project that aims to develop and maintain applications that can be useful for importing custom images in both schematics and printed circuit boards made with KiCAD

Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.