Search Results for "c-bus" - Page 8
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Showing 241 open source projects for "c-bus"
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Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor.
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A GDSII Viewer that reads a standard GDSII file format and displays the contents of the file in a graphical format. It allows the viewer to zoom and pan the contents of the file.
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PEP is a modelling and verification framework for parallel systems, providing a large number of different modelling languages and verification techniques (e.g. SDL, Petri nets and model checking)
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SPICE+ is a graphical user interface for the circuit simulator SPICE. It includes a full-featured schematic editor and a model editor. SPICE+ can be extended easily thanks to the plugin architecture.
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FXTurns-n-Layers is a graphical transformer and induction coil design aid. The program allows you to determine: the length (feet) and weight (lbs.) of wire needed to wind a coil. The program calculates the coil's finished dimensions and total resistance,
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This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.
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The DigitalSimulator is your Virtual Electronics Lab, allowing you to design, simulate and output your digital circuit board designs.
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Language used: c++ Libraries used: fltk OS: Linux Problem Description: Jtag management software for CPLD and jtag aware chips Major features: X11 UI, c++ platform for jtag apps Data formats: jtag, bsdl, binary Derived from existing project "jtag"
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VSTGL is a graphical editor for Signal Transition Graphs (STG) and Petri nets. VSTGL is able to export the created STG to Petrify - an advanced tool for analyzing and optimizing STG's - or run Petrify on the graph directly.
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LandXML C++ Software Development Kit. LandXML is an open, XML-based data standard for civil engineering and transportation applications.
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Call for the specifications of (next generation of spice) spice4. The concept of spice kernel is proposed. The main function of spice kernel is to provide a communication between "application layer" and "low-level Algorithm layer".
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toolbox with information and programs for Computer Aided Innovation The scientific background of Skidbladnir is known as the Theory of Inventive Problem Solving; in English abbreviated as TIPS or TRIZ, in German as TRIS.
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A static timing analysis program written in C++. Cadence LEF/DEF definitions of circuit geometry and SDF definitions of circuit timing data of a synchronous circuit are compiled in order to generate timing constraints for non-zero skew circuit operation.
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Integrated suite of engineering tools focusing on automation, portability, collaboration, and data management
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ESOMA is a component orientated framework for simulation and evaluation of arbitrary microprocessor and DSP architectures. Simulators using ESOMA are runtime configurable. Architectural changes do not need recompiling. Programming language is C++ (Linu
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XAvrTools is an open source graphical frontend for development with Atmels AVR microcontrollers using the UISP download tool and the AVR-GCC C compiler for LINUX. It is written in C++ using KDevelop and the QT library. It will include a software wizard.
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ViPEC is an network analyser for electrical networks. It takes a schematic description of an electrical network, and performs a simulation of the circuit response in the frequency domain. Output is in the form of port parameters (S, Y and Z).
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KFilter is an application to design acoustic hifi loudspeakers in a theoretical way. It provides an interactive analysis of the equivalent analogue circuit design.
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C++ template classes for Multi-Value Logic support arbitrary precision and user defined Multi-Value Logic types. This library comes with pre-defined data types: integer, boolean, bit, logic, std_logic, bit_vector, logic_vector and std_logic_vector.
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